Apparatus and method for automated transistor and

专利名称：Apparatus and method for automated

transistor and component folding toproduce cell structures

发明人：Patrick James McGuinness,Robert Lee

Maziasz,Andrei VladimirovitchZinchenko,Vladimir PavlovichRozenfeld,Michael Viacheslavovich

Golikov,Alexander Mikhailovich Marchenko

申请号：US10657609申请日：20030908

公开号：US20040078768A1公开日：20040422

专利附图：

摘要：A method for generating an integrated circuit layout is disclosed. Oneembodiment includes receiving an integrated circuit netlist describing a plurality oftransistors and a plurality of conductors for interconnecting the plurality of transistors,each of the plurality of transistors having a width in a layout corresponding to theintegrated circuit netlist. More than one of the plurality of transistors are determined tobe the widest transistors, all having the same width. One of the widest transistors isfolded to produce a folded transistor that is electrically equivalent to the widesttransistor. The folded transistor has at least two fingers, each finger having a smallerwidth than the width of the widest transistors. A fold solution for the layout having theone folded transistor is created.

申请人：MCGUINNESS PATRICK JAMES,MAZIASZ ROBERT LEE,ZINCHENKO ANDREIVLADIMIROVITCH,ROZENFELD VLADIMIR PAVLOVICH,GOLIKOV MICHAELVIACHESLAVOVICH,MARCHENKO ALEXANDER MIKHAILOVICH

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