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AK93C85A资料

2023-11-26 来源:爱问旅游网
元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]AK93C85A / 95A / 10A16K / 32K / 64Kbit Serial CMOS EEPROMFeatures󰀁󰀁󰀁󰀁󰀁󰀁󰀁󰀁󰀁󰀁󰀁󰀁ADVANCED CMOS EEPROM TECHNOLOGYREAD/WRITE NON-VOLATILE MEMORYWIDE VCC OPERATION 󰀁 Vcc = 1.8V 󰀂 5.5VAK93C85A 󰀁 󰀁 󰀁 16384 bits, 1024 󰀃 16 organizationAK93C95A 󰀁 󰀁 󰀁 32768 bits, 2048 󰀃 16 organizationAK93C10A 󰀁 󰀁 󰀁 65536 bits, 4096 󰀃 16 organizationSERIAL INTERFACE- Interfaces with popular microcontrollers and standard microprocessorsLOW POWER CONSUMPTION- 0.4mA max. Read Operation- 0.8󰀁A Max. StandbyHIGH RELIABILITY-Endurance: 100K cycles-Data Retention: 10 yearsAutomatic address increment (READ)Automatic write cycle time-out with auto-ERASE (Max. 8ms : VCC=4.5V 󰀂 5.5V)Busy/Ready status signalSoftware controlled write protectionIDEAL FOR LOW DENSITY DATA STORAGE- Low cost, space saving, 8-pin packageBlock DiagramDAM02E-01- 1 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]General DescriptionThe AK93C85A/95A/10A is a 16384/32768/65536-bit serial CMOS EEPROM divided into 1024/2048/4096registers of 16 bits each. The AK93C85A/95A/10A has 4 instructions such as READ, WRITE, EWEN andEWDS. Those instructions control the AK93C85A/95A/10A.The AK93C85A/95A/10A can operate full function under wide operating voltage range from 1.8V to 5.5V. Thecharge up circuit is integrated for high voltage generation that is used for write operation.A serial interface of AK93C85A/95A/10A, consisting of chip select (CS), serial clock (SK), data-in (DI) anddata-out (DO), can easily be controlled by popular microcontrollers or standard microprocessors.AK93C85A/95A/10A takes in the write data from data input pin (DI) to a register synchronously with risingedge of input pulse of serial clock pin (SK). And at read operation, AK93C85A/95A/10A takes out the readdata from a register to data output pin (DO) synchronously with rising edge of SK.The DO pin is usually in high impedance state. The DO pin outputs \"L\" or \"H\" in case of data output or Busy/Readysignal output.󰀁 Software controlled write protectionWhen Vcc is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In theERASE/WRITE disable state, execution of WRITE instruction is disabled. Before WRITE instruction isexecuted, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDSinstruction is executed or Vcc is removed from the part.Execution of a read instruction is independent of both EWEN and EWDS instructions.󰀁 Busy/Ready status signalAfter a write instruction, the DO output serves as a Busy/Ready status indicator. After the falling edge of theCS initiates the self-timed programming cycle, the DO indicates the Busy/Ready status of the chip if the CS isbrought high after a minimum of 250ns (Tcs). DO=logical \"0\" indicates that programming is still in progress.DO=logical \"1\" indicates that the register at the address specified in the instruction has been written with thenew data pattern contained in the instruction and the part is ready for a next instruction.The Busy/Ready status indicator is only valid when CS is active (high). When CS is low, the DO output goesinto a high impedance state.The Busy/Ready signal outputs until a start bit (Logic\"1\") of the next instruction is given to the part.󰀁 Type of ProductsModelAK93C85AFAK93C85AMAK93C95AFAK93C10AFMemory size16Kbits32Kbits64KbitsTemp.Range-40󰀁C󰀂85󰀁C-40󰀁C󰀂85󰀁C-40󰀁C󰀂85󰀁C-40󰀁C󰀂85󰀁CVcc1.8V󰀂5.5V1.8V󰀂5.5V1.8V󰀂5.5V1.8V󰀂5.5VPackage8pin Plastic SOP8pin Plastic SSOP8pin Plastic SOP8pin Plastic SOPDAM02E-01- 2 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]DAM02E-01Pin arrangementPin NameFunctionCSChip SelectSKSerial Data ClockDISerial Data InputDOSerial Data OutputGNDGroundVccPower SupplyNCNot Connected- 3 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]Functional DescriptionThe AK93C85A/95A/10A has 4 instructions such as READ, WRITE, EWEN and EWDS. A valid instructionconsists of a Start Bit (Logic\"1\"), the appropriate Op Code and the desired memory Address location.The CS pin must be brought low for a minimum of 250ns (Tcs) between each instruction when the instructionis continuously executed.Instruc-tion READ WRITE EWEN EWDS WRALStartBit11111OpCode1001000000AddressDataComments A9-A0 D15-D0 Reads data stored in memory, at specified address. A9-A0 D15-D0 Writes register. 11XXXXXXXX Write enable must precede all programming modes. 00XXXXXXXX Disables all programming instructions. 01XXXXXXXX D15-D0 Writes all registers.table1. Instruction Set for the AK93C85AInstruc-tion READ WRITE EWEN EWDS WRALStartBit11111OpCode1001000000AddressDataComments A10-A0 D15-D0 Reads data stored in memory, at specified address. A10-A0 D15-D0 Writes register. 11XXXXXXXXX Write enable must precede all programming modes. 00XXXXXXXXX Disables all programming instructions. 01XXXXXXXXX D15-D0 Writes all registers.table2. Instruction Set for the AK93C95AInstruc-tion READ WRITE EWEN EWDS WRALStartBit11111OpCode1001000000AddressDataComments A11-A0 D15-D0 Reads data stored in memory, at specified address. A11-A0 D15-D0 Writes register. 11XXXXXXXXXX Write enable must precede all programming modes. 00XXXXXXXXXX Disables all programming instructions. 01XXXXXXXXXX D15-D0 Writes all registers.table3. Instruction Set for the AK93C10A (Note) 󰀁The WRAL instruction are used for factory function test only. User can't use the WRAL instruction.󰀁The AK93C85A/95A/10A perceives the start bit in the logic\"1\" and also \"01\". DAM02E-01- 4 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]WriteThe write instruction is followed by 16 bits of data to be written into the specified address.AK93C85A : After the last bit of data is put on the DI pin, the CS pin must be brought lowbefore the next rising edge of the SK clock. This falling edge of the CS initiates the self-timed programmingcycle. The DO indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns(Tcs).AK93C95A/10A : The self-timed programming cycle is initiated on the rising edge of the SKclock as the last data bit (D0) is clocked in. The DO indicates the Busy/Ready status of the chip after the self-timed programming cycle is initiated.The Busy/Ready status indicator is only valid when CS is active (high). When CS is low, the DO output goesinto a high impedance state. The Busy/Ready signal outputs until a start bit (Logic\"1\") of the next instructionis given to the part.DO=logical \"0\" indicates that programming is still in progress. DO=logical \"1\" indicates that the register at theaddress specified in the instruction has been written with the new data pattern contained in the instruction andthe part is ready for a next instruction.DAM02E-01- 5 -1999/10元器件交易网www.cecb2b.com

ASAHI KASEI

[AK93C85A/95A/10A]

Read

The read instruction is the only instruction which outputs serial data on the DO pin.

Following the Start bit, first Op code and address are decoded, then the data from the selected memorylocation is available at the DO pin. A dummy bit (logical \"0\") precedes the 16-bit data from the selectedmemory location. The output data changes are synchronized with the rising edges of the serial clock (SK).The data in the next address can be read sequentially by continuing to provide clock. The addressautomatically cycles to the next higher address after the 16bit data shifted out.

AK93C85A 󰀁 󰀁 When the highest address is reached ($3FF), the address counter rolls over to

address $000 allowing the read cycle to be continued indefinitely.

AK93C95A 󰀁 󰀁 When the highest address is reached ($7FF), the address counter rolls over to

address $000 allowing the read cycle to be continued indefinitely.

AK93C10A 󰀁 󰀁 When the highest address is reached ($FFF), the address counter rolls over to

address $000 allowing the read cycle to be continued indefinitely.

DAM02E-01

- 6 -

1999/10

元器件交易网www.cecb2b.com

ASAHI KASEI

[AK93C85A/95A/10A]

EWEN / EWDS

When Vcc is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In theERASE/WRITE disable state, execution of WRITE instruction is disable. Before WRITE instruction isexecuted, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDSinstruction is executed or Vcc is removed from the part.

Execution of a read instruction is independent of both EWEN and EWDS instructions.

DAM02E-01

- 7 -

1999/10

元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]Absolute Maximum RatingsParameterPower SupplyAll Input Voltageswith Respect to GroundAmbient storage temperatureSymbolVCCVIOTstMin-0.6-0.6-65Max+7.0VCC+0.6+150UnitVV󰀁CStress above those listed under \"Absolute Maximum Ratings\" may cause permanentdamage to the device. This is a stress rating only and functional operation of the device atthese or any other conditions above those indicated in the operational sections of thespecification is not implied. Exposure to absolute maximum conditions for extendedperiods may affect device reliability.Recommended Operating ConditionParameterPower SupplyAmbient Operating TemperatureSymbolVCCTaMin1.8-40Max5.5+85UnitV󰀁CDAM02E-01- 8 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]Electrical Characteristics (1) D.C. ELECTRICAL CHARACTERISTICS ( 1.8V󰀃Vcc󰀃5.5V, -40󰀁C󰀃Ta󰀃85󰀁C, unless otherwise specified )ParameterSymbolConditionVCC=5.5V, tSKP=1us, VCC=1.8V, tSKP=4us, VCC=5.5V, tSKP=1us, VCC=1.8V, tSKP=4us, VCC=5.5V *1*1*1*1*20.8 󰀄 VCC-0.10.8 󰀄 VCC0.8 󰀄 VCC0.40.4󰀁1.0󰀁1.0Min.Max.5.53.00.40.10.8VCC+0.50.2 󰀄 VCCUnitmAmAmAmAuAVVVVVVuAuACurrent DissipationICC1 (WRITE)ICC2Current DissipationICC3(READ,EWEN,EWDS)ICC4Current DissipationICCSB (Standby)Input High VoltageVIHInput Low VoltageVILOutput High VoltageVOH1VOH2Output Low VoltageVOL1VOL2Input LeakageOutput LeakageILIILO 2.5V󰀃VCC󰀃5.5V IOH=-0.1mA 1.8V󰀃VCC<2.5V IOH=-0.1mA 2.5V󰀃VCC󰀃5.5V IOL=1.0mA 1.8V󰀃VCC<2.5V IOL=0.1mA VCC=5.5V,VIN=5.5V VCC=5.5V VOUT=5.5V,CS=GND *1:VIN=VIH/VIL,DO=Open *2:VIN=VCC/GND,CS=GND,DO=OpenDAM02E-01- 9 -1999/10元器件交易网www.cecb2b.comASAHI KASEI(2) A.C. ELECTRICAL CHARACTERISTICS( 1.8V󰀃Vcc󰀃5.5V, -40󰀁C󰀃Ta󰀃85󰀁C, unless otherwise specified )ParameterSK Cycle TimeSymbolCondition4.5V󰀃VCC󰀃5.5V2.0V󰀃VCC<4.5V1.8V󰀃VCC<2.0V4.5V󰀃VCC󰀃5.5V2.0V󰀃VCC<4.5V1.8V󰀃VCC<2.0VMin.1.02.04.05001.02.010002002005001.02.0810250CL=100pFCL=100pF2.0V󰀃VCC󰀃5.5V1.8V󰀃VCC<2.0V5001000100250Max.Unitusususnsususnsnsnsnsnsususmsmsnsnsnsnsns[AK93C85A/95A/10A]tSKP1tSKP2tSKP3SK Pulse WidthtSKW1tSKW2tSKW3CS Setup TimetCSSCS Hold TimetCSHData Setup TimetDISData Hold TimetDIHOutput delaytPD1tPD2tPD3Selftimed ProgrammingtE/W1TimetE/W2Min CS Low TimetCSCS to Status Valid1tSVCS to Status Valid2tSVVCS to Output High-ZtOZ1tOZ2 *3:CL=100pF4.5V󰀃VCC󰀃5.5V, *32.0V󰀃VCC<4.5V, *31.8V󰀃VCC<2.0V. *34.5V󰀃VCC󰀃5.5V1.8V󰀃VCC<4.5VDAM02E-01- 10 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]Synchronous Data timingThe Start of InstructionThe End of InstructionDAM02E-01- 11 -1999/10元器件交易网www.cecb2b.comASAHI KASEI[AK93C85A/95A/10A]Busy/Ready Signal Output (AK93C85A)Busy/Ready Signal Output (AK93C95A/10A)DAM02E-01- 12 -1999/10元器件交易网www.cecb2b.com

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