TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999Terminal FunctionsTERMINALNAMEAGNDANALOG INCLKDGNDD1–D8OEVDDAVDDDREFBREFBSNO.20, 2119122, 243–10114, 15, 1811, 132322IOIIII/OAnalog groundAnalog inputClock inputDigital groundDigital data out. D1:LSB, D8:MSBOutput enable. When OE = L, data is enabled. When OE = H, D1–D8 is high impedance.Analog VDDDigital VDDADC reference voltage in (bottom)Reference voltage (bottom). When using the internal voltage divider to generate a nominal 2-V reference,the REFBS terminal is shorted to the REFB terminal and the REFTS terminal is shorted to the REFT terminal(see Figure 13 and Figure 14).IReference voltage in (top)Reference voltage (top). When using the internal voltage divider to generate a nominal 2-V reference, theREFTS terminal is shorted to the REFT terminal and the REFBS terminal is shorted to the REFB terminal(see Figure 13 and Figure 14).DESCRIPTIONREFTREFTS1716absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†Supply voltage, VDDA, VDDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 VReference voltage input range, VI(REFT), VI(REFB), VI(REFBS), VI(REFTS) . . . . . . . . . . . . . . . AGND to VDDAAnalog input voltage range, VI(ANLG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to VDDADigital input voltage range, VI(DGTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to VDDDDigital output voltage range, VO(DGTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to VDDDOperating free-air temperature range, TA: TLC5540C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°CTLC5540I –40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 85°CStorage temperature range, Tstg –55. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 150°C†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•3 TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999electrical characteristics at VDD = 5 V, VI(REFT) = 2.6 V, VI(REFB) = 0.6 V, fs = 40 MSPS, TA = 25°C(unless otherwise noted)PARAMETERELEDLinearityerrorintegralLinearity error, integralLinearityerrordifferentialLinearity error, differentialSelf bias (1), VRBSelf bias (1), VRTSelf bias (2), VRBSelf bias (2), VRTIrefRrefCiEZSEFSIIHIILIOHIOLIOZH(lkg)Reference-voltage currentReference-voltage resistorAnalog input capacitanceZero-scale errorFull-scale errorHigh-level input currentLow-level input currentHigh-level output currentLow-level output currentHigh-levelhigh-impedance-stateoutput leakage currentLow-levelhigh-impedance-stateoutput leakage currentSupply currentfs = 40 MSPS,,VI = 0.6 V to 2.6 VShort REFB to REFBSShort REFT to REFTSShort REFB to AGNDShort REFT to REFTSTEST CONDITIONS†TA = 25°CTA = MIN to MAXTA = 25°CTA = MIN to MAXSeeFigure13See Figure 13SeeFigure14See Figure 140.572.472.185.2165–18–25MINTYP±0.6±0.30.612.63AGND2.297.52704–430–682555VOH = VDD–0.5 VVOL = 0.4 VVOH = VDD–1.52.516µAOE = VDD,fs = 40 MSPS,CL 25 pF,VDD = 4.75,VOL = 017162.412350mAΩpFmVµAmAMAX±1±1±0.75±10.652.80VLSBUNITVI(REFT) – VI(REFB) = 2 VBetween REFT and REFB terminalsVI(ANLG) = 1.5 V + 0.07 VrmsVI(REFT) – VVI(REFB) = 2 V=2VVDD = 5.25 V,VDD = 5.25 V,OE = GND,OE = GND,OE = VDD,VIH = VDDVIL = 0VDD = 4.75 V,VDD = 4.75 V,VDD = 5.25,IOZL(lkg)IDDNTSC‡ ramp wave input,See Note 227mA†Conditions marked MIN or MAX are as stated in recommended operating conditions.‡National Television System CommitteeNOTE 2:Supply current specification does not include Iref.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•5SLAS105C – JANUARY 1995 – REVISED MAY 1999TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER operating characteristics at VDD = 5 V, VRT = 2.6 V, VRB = 0.6 V, fs = 40 MSPS, TA = 25°C (unlessotherwise noted)PARAMETERfsfsBWtpdtPHZtPLZtPZHtPZLMaximum conversion rateMinimum conversion rateAnalog input full-power bandwidthDelay time, digital outputDisable time, output high to Hi-ZDisable time, output low to Hi-ZEnable time, Hi-Z to output highEnable time, Hi-Z to output lowDifferential gainDifferential phasetAJtd(s)Aperture jitter timeSampling delay timefI = 1 MHzfI = 3 MHzfI = 6 MHzfI = 10 MHzfI = 3 MHzfI = 6 MHzfI = 10 MHzfI = 1 MHzfs = 20 MSPS=20MSPSENOBEffectivenumberofbitsEffective number of bitsfs = 40 MSPS=40MSPSfI = 3 MHzfI = 6 MHzfI = 10 MHzfI = 3 MHzfI = 6 MHzfI = 1 MHzfI = 3 MHzfI = 6 MHzfI = 10 MHzfI = 3 MHzfI = 6 MHzfI = 3 MHz=3MHz41354244TEST CONDITIONS†TA = MIN to MAXTA = MIN to MAXAt – 3 dB,VI(ANLG) = 2 VppCL ≤ 10 pF (see Note 3)CL ≤ 15 pF,CL ≤ 15 pF,CL ≤ 15 pF,CL ≤ 15 pF,IOH = –4.5 mAIOL = 5 mAIOH = –4.5 mAIOL = 5 mA1%0.73044747464545.244427.647.617.477.1676.84342413840384642dBcdBcBitsdBdegreespsnsMIN4057591520201515TYPMAXUNITMSPSMSPSMHznsnsnsnsnsNTSC 40 IRE‡ modulation wave,fs = 14.3 MSPSfs = 20 MSPS=20MSPSSNRSignal-to-noise ratiofs = 40 MSPSfs = 20 MSPS=20MSPSTHDTotalharmonicdistortionTotal harmonic distortionfs = 40 MSPS=40MSPSSpuriousfreedynamicrangeSpurious free dynamic rangefs = 20 MSPSfs = 40 MSPS†Conditions marked MIN or MAX are as stated in recommended operating conditions.‡Institute of Radio EngineersNOTE 3:CL includes probe and jig capacitance.6POST OFFICE BOX 655303 DALLAS, TEXAS 75265•SLAS105C – JANUARY 1995 – REVISED MAY 1999TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER TYPICAL CHARACTERISTICSPOWER DISSIPATIONvsSAMPLING FREQUENCY200VDD = 5 VTA = 25°C1500.50–0.5Power Dissipation – mW–1–1.5Gain – dB–2–2.5–350–3.5–4–4.5005253510203015fs – Sampling Frequency – MHz40–50.1VCC = 5 V, VRT = 2.6 V, VRB = 0.6 VCLK = 40 MHzANALOG IN = 100 k – 100 MHz Sine WaveVI = 2 V(PP)110100100 ANALOG INPUT BANDWIDTHfI – Input Frequency – MHzFigure 3EFFECTIVE NUMBER OF BITSvsINPUT FREQUENCY8fs = 20 MHzENOB – Effective Number of Bits – BITS7SNR – Signal-to-Noise Ratio – dB6543210VDD = 5 V, VI = 1 V(PP)VRB = 2.6 V, VRT = 0.6 V051015fs = 40 MHz5045403530252015105005Figure 4SIGNAL-TO-NOISE RATIOvsINPUT FREQUENCYfs = 20 MHzfs = 40 MHzVDD = 5 V, VI = 1 V(PP)VRB = 2.6 V, VRT = 0.6 V1015fI – Input Frequency – MHzfI – Input Frequency – MHzFigure 5Figure 68POST OFFICE BOX 655303 DALLAS, TEXAS 75265• TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999PRINCIPLES OF OPERATIONinternal reference voltage conversionThree internal resistors allow the device to generate an internal reference voltage. These resistors are broughtout on terminals VDDA, REFTS, REFT, REFB, REFBS, and AGND. Two different bias voltages are possiblewithout the use of external resistors.Internal resistors are provided to develop REFT = 2.6 V and REFB = 0.6 V (bias option one) with only twoexternal connections. This is developed with a 3-resistor network connected to VDDA. When using this feature,connect REFT to REFTS and connect REFB to REFBS. For applications where the variance associated withVDDA is acceptable, this internal voltage reference saves space and cost (see Figure 14).A second internal bias option (bias two option) is shown in Figure 15. Using this scheme REFB = AGND andREFT = 2.28 V nominal. These bias voltage options can be used to provide the values listed in the followingtable.Table 1. Bias Voltage OptionsBIASOPTIONBIAS OPTION12BIAS VOLTAGEVRB0.61AGNDVRT2.632.28VRT – VRB2.022.28To use the internally-generated reference voltage, terminal connections should be made as shown inFigure 14 or Figure 15. The connections in Figure 14 provide the standard video 2-V reference.VDDA5 V (Analog)REFTS18TLC5540R1320 Ω NOM16170.1 µFREFTREFB23220.1 µFREFBSAGND21R280 Ω NOM2.63 V dcRref270 Ω NOM0.61 V dcFigure 14. External Connections Using the Internal Bias One OptionPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•13 TLC55408-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999MECHANICAL DATAPW (R-PDSO-G**) 14 PINS SHOWNPLASTIC SMALL-OUTLINE PACKAGE0,651480,300,190,10M0,15 NOM4,504,306,606,20Gage Plane0,251A70°–8°0,750,50Seating Plane1,20 MAX0,150,050,10PINS **DIMA MAX83,10145,10165,10206,60247,90289,80A MIN2,904,904,906,407,709,604040064/F 01/97NOTES:A.B.C.D.All linear dimensions are in millimeters.This drawing is subject to change without notice.Body dimensions do not include mold flash or protrusion not to exceed 0,15.Falls within JEDEC MO-153POST OFFICE BOX 655303 DALLAS, TEXAS 75265•15IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright © 1999, Texas Instruments Incorporated