entirely voluntary, and its applicability and suitability for any particular use, including any patent infringement arising therefrom, is the sole responsibility of the user.” SAE reviews each technical report at least every five years at which time it may be reaffirmed, revised, or cancelled. SAE invites your written comments and suggestions. Copyright © 2004 SAE International
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SAE J1708 Revised AUG2004
3 Definitions...............................................................................................................................4 3.1 Bus Access Time...................................................................................................................4 3.2 Baud.......................................................................................................................................4 3.3 Bit Time................................................................................................................................. 4 3.4 Character.............................................................................................................................. 4 3.5 Character Time......................................................................................................................4 3.6 Contention..............................................................................................................................4 3.7 Differential Signal...................................................................................................................4 3.8 Idle State............................................................................................................................... 4 3.9 Idle Line..................................................................................................................................5 3.10 Message Priority....................................................................................................................5 3.11 Node.......................................................................................................................................5 3.12 Start Bit...................................................................................................................................5 3.13 Stop Bit...................................................................................................................................5
4 Electrical Parameters.............................................................................................................5 4.1 Logic State.............................................................................................................................5 4.2 Bus State................................................................................................................................5 4.2.1 Logic High State.....................................................................................................................6 4.2.2 Logic Low State......................................................................................................................6 4.3 Network Capacity...................................................................................................................6 4.4 Bus Termination.....................................................................................................................6 4.5 Ground...................................................................................................................................6 4.6 Wire........................................................................................................................................6 4.7 Length....................................................................................................................................6
5 Network Parameters..............................................................................................................6 5.1 Network Topology..................................................................................................................6 5.2 Network Access.....................................................................................................................7 5.2.1 Idle Line – Bus Synchronization by a Receiver.....................................................................7 5.2.2 Bus Access............................................................................................................................8 5.2.3 Bus Contention.....................................................................................................................10
6 Protocol................................................................................................................................10 6.1 Bit Time................................................................................................................................10 6.2 Character Format.................................................................................................................10 6.3 Message Format..................................................................................................................10 6.3.1 Message Content.................................................................................................................10 6.3.2 Inter-Character Bit Time.......................................................................................................10 6.3.3 Message Identification Character (MID)..............................................................................11 6.3.4 Data Characters...................................................................................................................12 6.3.5 Checksum............................................................................................................................13 6.3.6 Message Length...................................................................................................................13 6.3.7 Message Length Exceptions................................................................................................13
7 Notes....................................................................................................................................13 7.1 Marginal Indicia....................................................................................................................13
Appendix A ..........................................................................................................................................14 Appendix B ..........................................................................................................................................15
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SAE J1708 Revised AUG2004
1.
Scope
This SAE Recommended Practice defines a recommended practice for implementing a bidirectional, serial communication link among modules containing microcomputers. This document defines those parameters of the serial link that relate primarily to hardware and basic software compatibility such as interface requirements, system protocol, and message format. The actual data to be transmitted by particular modules, which is an important aspect of communications compatibility, is not specified in this document. These and other details of communication link implementation and use should be specified in the separate application documents referenced in Section 2. 1.1
Purpose
The purpose of this document is to define a general-purpose serial data communication link that may be utilized in heavy-duty vehicle applications. It is intended to serve as a guide toward standard practice to promote serial communication compatibility among microcomputer-based modules. The primary use of the general-purpose communications link is expected to be the sharing of data among stand-alone modules to cost effectively enhance their operation. Communication links used to implement functions that require a dedicated communication link between specific modules may deviate from this document. 2. 2.1
References
Applicable Publications
The following publications form a part of the specification to the extent specified herein. Unless otherwise indicated the latest revision of SAE publications shall apply.
It is recommended that a separate applications document be published by the manufacturer for each device using the serial link. These documents should define the data format, message I.D.s, message priorities, error detection (and correction), maximum message length, percent bus utilization, and methods of physically adding/removing units to/from the line for the particular application. 2.1.1
SAE PUBLICATIONS
Available from SAE, 400 Commonwealth Drive, Warrendale, PA 15096-0001.
SAE J1455—Joint SAE/TMC Recommended Environmental Practices for Electronic Equipment Design
(Heavy-Duty Trucks) SAE J1587—Joint SAE/TMC Recommended Practice for Electronic Data Interchange Between
Microcomputer Systems in Heavy-Duty Vehicle Applications
SAE J1922—Powertrain Control Interface for Electronic Controls Used in Medium and Heavy-Duty Diesel
on Highway Vehicle Applications
SAE J2497—Power Line Carrier Communications for Commercial Vehicles
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SAE J1708 Revised AUG2004
2.1.2
EIA PUBLICATION
Available from Electronic Industries Association, 12001 Pennsylvania Avenue, NW, Washington, DC 20006.
EIA RS-485—Standard for Electrical Characteristics of Generators and Receivers for Use in Balanced
Digital Multipoint Systems, April 1983 3. 3.1
Definitions Bus Access Time
A time duration equal to the minimum time of an Idle Line plus the product of 2 bit times and the message priority (which ranges from 1 to 8). An example is shown in section 5.2.2.3. 3.2
Baud
The maximum number of analog signal transitions per second that can occur on a channel. In this coding system, this is the reciprocal of the bit time. 3.3
Bit Time
Duration or period of one unit of information. 3.4
Character
A character shall consist of 10 bit times. The character must start with a low-logic bit, then 8 bits of data (least significant bit first) followed by a high-logic level stop bit. 3.5
Character Time
The duration of one character which is equal to 10 bit times. 3.6
Contention
A state of the bus in which two or more transmitters are turned on simultaneously to conflicting logic states. 3.7
Differential Signal
A two-wire process in which both lines are switched as opposed to a single-ended signal wherein one line is grounded and the signal line is switched between logic states. 3.8
Idle State
The state that produces a high-logic level on the input of the bus receiver when all transmitters on the network are turned off.
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SAE J1708 Revised AUG2004
3.9
Idle Line
The condition that exists when the bus has remained in a continuous high-logic state for at least 10 bit times after the end of the last stop bit. The minimum time duration of an idle line is 10 bit times. An example is shown in section 5.2.1.
NOTE—The idle line serves as the delimiter between messages on the bus. 3.10 Message Priority
A measure of message criticality assigned on a scale of 1 to 8 by the appropriate applications document. The most critical message has a priority of one. 3.11 Node
A receiver or transceiver circuit connected to the bus. 3.12 Start Bit
Initial element of a character defined as a low-logic level of 1 bit time duration as viewed at the output of the bus receiver. 3.13 Stop Bit
Final element of a character defined as a high-logic level of 1 bit time duration as viewed at the output of the bus receiver. 4.
Electrical Parameters
The electrical parameters of this serial data link are a modification of the EIA RS-485 standard. In some areas this document conflicts with EIA RS-485. This document shall serve as the guiding document in such cases. Appendix A details a serial data bus standard node which defines the interface circuit parameters. Operation of this standard node is detailed in this section. 4.1
Logic State
Positive true logic will be used when referring to the states of transmitted inputs and received outputs. Referring to Appendix A, the input of the transmitter (marked as point Tx) and the output of the receiver (marked as Rx) will be in logic 1 state when driven or passively pulled to +V, and will be at a logic 0 state when driven to ground. 4.2
Bus State
The bus is in a logic 1 (high) state whenever Point A is at least 0.2 V more positive than Point B. The bus is in a logic 0 (low) state whenever Point A is at least 0.2 V more negative than Point B (Points A and B, refer to Figure A1). The bus state is indeterminate when the differential voltage is less than 0.2 V.
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SAE J1708 Revised AUG2004
4.2.1
LOGIC HIGH STATE
The bus will be in a logic 1 (high) state when all connected transmitters are idle or sending logic 1. An idle state is produced when all transmitters on the network are turned off. All nodes shall include means to pull the bus to a logic 1 (high) when all transmitters are off (see Appendix A). 4.2.2
LOGIC LOW STATE
The bus will be in a logic 0 (low) state when one or more transmitters are sending logic 0, which guarantees that logic 0 (low) dominates when the bus is in contention. 4.3
Network Capacity
The bus will support a minimum of 20 standard nodes where each node is comprised of the circuit defined in Appendix A. Deviations from this circuit must be carefully analyzed to determine impact on bus loading and noise margins over the common mode range. 4.4
Bus Termination
Bus-termination resistors as referenced in EIA RS-485 are not required and shall not be used. 4.5
Ground
All assemblies using the link must have common ground reference. 4.6
Wire
A minimum of 18-gauge twisted-pair wire, with a minimum of one twist per inch (360 degrees/2.54 cm) is required. The twists shall be distributed evenly over the length of the wire. 4.7
Length
This document is intended for, but not limited to, applications with a maximum length of 131 feet (40 m). 5. 5.1
Network Parameters Network Topology
The network interconnect shall use a common or global bus. There is no restriction on the length between each Electronic Control Unit, but the total length of the network datalink (total length = A+B+C+D+E+F) shall not exceed 131 feet (40m).
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SAE J1708 Revised AUG2004
FIGURE 1—NETWORK TOPOLOGY
5.2
Network Access
The method of access to the network is random. 5.2.1
IDLE LINE – BUS SYNCHRONIZATION BY A RECEIVER
A receiver that cannot distinguish between a stop bit and any other high-logic state may become synchronized with the bus by noting the receipt of 12 consecutive high-logic bits. In the absence of errors, the first low-logic bit (0) following 12 consecutive high-logic bits (1) is the start bit of a message identification character (MID) (that is, the first character of a message).
EXAMPLE—A Receiver that has just connected to the data link will not know the current message strings
being broadcast. The goal of the Receiver is to find an Idle Line, so the MID character of the next string can be determined. The Receiver could see the reception of all high-logic levels as shown in “Worst Case Character Time bit map” in Figure 2 in Section 5.2.2.3. In this case, there would be 8 high-logic level data bit times, 1 high-logic level for the stop bit, and up to 2 high-logic level inter-character bit times. This means that 11 bit times at high-logic level define the start of a new character, but not necessarily a MID character. If the next logic level seen by the Receiver is a low logic level, then another Character Time will follow and the Bus Synchronization must start over. If the next logic level seen by the Receiver is a high-logic level, then an Idle Line may have been identified. If, as shown in Figure 2, there was a Start Bit at the beginning of the 12 bit times, then a true Idle Line time has not occurred. The receiver will not see a start bit until a total of 19 high-logic levels plus the product of 2 bit times and the message priority (which ranges from 1 to 8) of the next message to be transmitted are seen. However, if the receiver did not see the first bit in the Figure 2 “Worst Case Character Time bit map” row, that is the Start bit shown at the far left, then it would have to assume that the string of 12 highlogic levels could be a valid Idle Line and therefore, the next low-logic level would be the start bit of a MID. When the next low-logic level is seen the receiver can assume that it has achieved Bus Synchronization.
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SAE J1708 Revised AUG2004 5.2.2 BUS ACCESS A transmitter shall begin transmitting a message only after an idle state has continuously existed on the bus for at least a bus access time. 5.2.2.1 Bus Access Verification The transmitter must verify that the idle state continues to exist immediately prior to initiating a transmission. The time between the bus being verified while in the idle state (bus access verification) and the initiation of a transmission shall be less than one-half bit time. 5.2.2.2 Bus Access Time Bus access time is a time duration equal to the minimum time of an idle line plus the product of 2 bit times and the message priority. This relationship can be expressed as follows: Ta=Ti+[2∗Tb]∗P (Eq. 1) where: Ta = Bus access time Tb = Bit time, or period of one unit of information P = Message priority Ti = Minimum time duration of an idle line TABLE 1—BUS ACCESS TIME Ta 12 Bit times 14 Bit times 16 Bit times 18 Bit times 20 Bit times 22 Bit times 24 Bit times 26 Bit times Ti 10 Bit times 10 Bit times 10 Bit times 10 Bit times 10 Bit times 10 Bit times 10 Bit times 10 Bit times Tb P 1 Bit time 1 Bit time 1 Bit time 1 Bit time 1 Bit time 1 Bit time 1 Bit time 1 Bit time 1 2 3 4 5 6 7 8 5.2.2.3 Bus Access Time Synchronization by a Transmitter The minimum time duration of an idle line is defined in 3.9. However, a transmitter that cannot distinguish between a stop bit and any other high-logic state may not assume that Ti has elapsed until it has received 19 consecutive high-logic bits.
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SAE J1708 Revised AUG2004 EXAMPLE—A Transmitter that has just connected to the data link will not know the current message strings being broadcast. The goal of the Transmitter is to find an Idle Line, so message transmission can be initiated. The Transmitter could see the occurrence of all high-logic levels as shown in “Worst Case Character Time bit map” in Figure 2. In this case, there would be 8 high logic level data bit times, 1 high-logic level for the stop bit, and up to 2 high-logic level inter-character bit times. This means that 11 bit times at high-logic level define the start of a new character, but not necessarily a MID character. If the next logic level seen by the Transmitter is a low-logic level, then another Character Time will follow and the Bus Access Time Synchronization must start over. If the next eight logic levels seen by the Transmitter are high-logic levels, then Ti must have elapsed, and now the transmitter still must wait a time duration equal to the product of 2 bit times and the message priority (which ranges from 1 to 8) before beginning its message transmission. FIGURE 2—EXAMPLE BUS ACCESS TIME SYNCHRONIZATION 5.2.2.4 Message Priority Assignment All messages will be assigned a priority from 1 to 8 as indicated in Table 2: TABLE 2—MESSAGE PRIORITY ASSIGNMENT Priority Message Assignment 1 and 2 3 and 4 5 and 6 7 and 8 Reserved for messages that require immediate access to the bus Reserved for messages that require prompt access to the bus in order to prevent severe mechanical damage Reserved for messages that directly affect the economical or efficient operation of the vehicle All other messages not fitting into the previous priority categories should be assigned a priority 7 or 8 The applications document shall define the priority associated with each message. In the event that more than one priority could be assigned to a particular message, the application document shall define each priority and the circumstances in which the priority is assigned.
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SAE J1708 Revised AUG2004
5.2.3
BUS CONTENTION
All transmitters shall monitor the message identification portion of their message to determine if another transmitter has attempted to gain access to the bus at the same time. If a transmitter detects a collision, the transmitter shall relinquish control of the bus after completing the transmission of the current character or sooner if possible. After relinquishing control, it is recommended that the transmitter become a receiver, using the received MID as the beginning of the incoming message. The transmitter may attempt to regain access to the bus after a bus access time has elapsed. An example bus reaccess procedure is shown in Appendix B. 6. 6.1
Protocol Bit Time
A bit time shall be 104.17 µs ± 0.5% (± 500 ns). This is equivalent to a baud rate of 9600 bits per second. 6.2
Character Format
A character shall consist of 10 bit times. The first bit shall always be a low-logic level and is called the start bit. The last (tenth) bit shall always be a high-logic level and is called the stop bit.
This conversion is consistent with standard UART operation. The remaining eight center bits are data bits that are transmitted least significant bit (LSB) first. 6.3 6.3.1
Message Format MESSAGE CONTENT
A message appearing on the communication bus shall consist of the following:
a. Message Identification Character (MID) b. Data Characters c. Checksum
Example messages:
Shortest Message: MID Checksum
Single data string: MID Data1 Checksum
Multiple data string: MID Data1 Data2 Data3 Data(n) Checksum
As indicated in Section 5.2, a message shall always be preceded by an idle state of duration equal to or greater than the appropriate bus access time. 6.3.2
INTER-CHARACTER BIT TIME
The length of time between characters within a message shall not exceed 2 bit times. The minimum length of time between characters within a message can be zero bit times.
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SAE J1708 Revised AUG2004
6.3.3
MESSAGE IDENTIFICATION CHARACTER (MID)
The first character of every message shall be a MID. The permitted range of MIDs shall include the numbers 0 to 255. 6.3.3.1
MID Assignments
The MIDs 0 to 68 shall be assigned to transmitter categories as identified in Table 3. These assignments have been made to accommodate existing systems, or systems that may presently be under development, and to avoid conflicts, which otherwise might arise if indiscriminate use of MIDs were permitted.
MIDs 10 and 11 shall be used for trailer ABS Power Line Carrier (PLC) communications. See SAE J2497 Power Line Carrier Communications for Commercial Vehicles. MIDs 69 to 86 have been set aside for use by the SAE J1922.
MID 87 is defined in SAE J2497 Power Line Carrier Communications for Commercial Vehicles.
MIDs 88 to 110 shall be allocated as reserved MIDs for transmitter categories beyond those that are identified in Table 3. These MIDs shall be individually assigned by the SAE Low Speed Communications Network Subcommittee of the SAE Truck and Bus Electrical and Electronic Committee on petition by a manufacturer at the time a new transmitter category is identified, or when additional MIDs are required within a previously identified category.
MID 111 shall be used exclusively for factory test of electronic modules. Since it is possible that during factory test the normal control software is bypassed, giving the tester direct control of module l/o, several precautions should be observed:
a. Entry into factory test should be granted by the module control software only after ensuring that it is
safe to do so.
b. This MID should not be transmitted by any on-board module.
MIDs 112 to 127 are not assigned to any category and are not reserved for future assignment. These MIDs are available to any manufacturer or user for any message identification purpose outside the scope of this document.
MIDs in the range of 128 to 255 shall be reserved for applications using formatted data as set forth in the SAE J1587 document issued by the SAE Low Speed Communications Network Subcommittee. These MIDs shall only be used when the data format set forth within that document is strictly followed (see SAE J1587).
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SAE J1708 Revised AUG2004 TABLE 3—MESSAGE IDENTIFICATION CHARACTER ALLOCATION Message Range 00-07 ENGINE 08-09 BRAES, TRACTOR 10-11 BRAKES, TRAILER (USED BY SAE J2497) Transmitter Category 12-13 TIRES, TRACTOR 14-15 TIRES, TRAILER 16-17 SUSPENSION, TRACTOR 18-19 SUSPENSION, TRAILER 20-27 TRANSMISSION 28-29 ELECTRICAL CHARGING SYSTEM 30-32 ELECTRICAL 33-35 CARGO REFRIGERATION/HEATING 36-40 INSTRUMENT CLUSTER 41-45 46-47 DRIVER INFORMATION CENTER CAB CLIMATE CONTROL 48-55 DIAGNOSTIC SYSTEMS 56-61 TRIP RECORDER 62-63 TURBOCHARGER 64-68 OFF-BOARD DIAGNOSTICS 69-86 87 88-110 111 112-127 128-255 KSET ASIDE FOR SAE J1922 SET ASIDE FOR SAE J2497 DEFINED BY SAE LOW SPEED COMMUNICATIONS NETWORK SUBCOMMITTEE RESERVED--FACTORY ELECTRONIC MODULE TESTER (OFF VEHICLE) UNASSIGNED—AVAILABLE FOR USE DEFINED BY SAE LOW SPEED COMMUNICATIONS NETWORK SUBCOMMITTEE (see SAE J1587) 6.3.3.2 MID Definitions MIDs in the 0 to 9, 12 to 68 and 88 to 127 ranges shall be defined in the manufacturer's applications document. Content and format of the data within these messages is not defined in this document but should be identified in a manufacturer's applications document as described in Section 2. It shall be the responsibility of the systems integrator or user to ensure that a particular MID is not used by more than one device on the same vehicle. 6.3.4 DATA CHARACTERS Data characters shall be characters that convey the intelligence of the message and shall conform to the character format as defined in 6.2. The 8 bit data character may be given any value from 0 to 255. The data characters shall be defined in an appropriate applications document at the option of the supplier. The application document shall define parameters, parameter order, scaling, and error detection/ correction coding if applicable.
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SAE J1708 Revised AUG2004
6.3.5
CHECKSUM
The last character of each message shall be the two's complement of the sum of the MID and the data characters. Simple message error detection may be implemented by adding the checksum to the sum of all previous message characters (including the MID). The 8 bit sum will be zero, neglecting the CARRY, for a correctly received message. 6.3.6
MESSAGE LENGTH
Total message length, including MID and checksum, shall not exceed 21 characters.
6.3.7 MESSAGE LENGTH EXCEPTIONS
a. The 21 byte length limitation may be exceeded when the engine is not running and the vehicle is not
moving.
b. Messages longer than 21 characters may also be broken up into several separate messages of 21 or
fewer characters and may then be transmitted while the engine is running and/or the vehicle is moving by conforming to the 21 character message length limitation of SAE J1708. 7. 7.1
Notes
Marginal Indicia
The final balloted document will contain Marginal Indicia to show the revisions of the latest published version.
The change bar (l) located in the left margin is for the convenience of the user in locating areas where technical revisions have been made to the previous issue of the report. An (R) symbol to the left of the document title indicates a complete revision of the report.
PREPARED BY THE SAE LOW SPEED NETWORK COMMUNICATIONS SUBCOMMITTEE OF THE
SAE TRUCK AND BUS ELECTRICAL AND ELECTRONICS COMMITTEE
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SAE J1708 Revised AUG2004
APPENDIX A
SERIAL DATA BUS STANDARD NODE (UNIPOLAR DRIVE WITH PASSIVE
TERMINATION IN EACH MODULE)
FIGURE A1—SERIAL DATA BUS STANDARD NODE DIAGRAM
A.1
This circuit utilizes standard RS-485 transceivers (less than or equal to one RS-485 unit load) connected to drive the differential data bus to the logic zero state only (unipolar drive). In the previous circuit, a standard RS- 485 receiver may be used in place of a transceiver in applications where data need not be placed on the bus (that is, receive only).
The logic 1 state (also idle state) is controlled by pull-up resistor R1 and pull-down resistor R2. The transceiver output impedance, C1 and C2, form the transmit filter for transient and EMI suppression (approximately 6 MHz low pass).
R3, C1, R4, and C2 form the receive filter for EMI suppression (approximately 1.6 MHz low pass). These parts also form a pseudo line termination at high frequencies.
The active (high-to-low) transition delay is approximately 0.6 ms at the receiver with two nodes on the bus and 2.3 ms with 20 nodes on the bus.
The passive (low-to-high) transition delay at the receiver remains at 10 ms with any number of loads on the bus (up to 20).
The values shown were chosen for use with commercially available RS-485 drivers to provide maximum fan- out, EMI suppression, and bus termination. Remaining nodes may be in either the powered or unpowered state.
This method of unipolar drive prevents unresolved contention (logic 0 always wins).
The resistors shown should be 5% parts to assure sufficient noise margin under worst-case conditions. R3, R4, C1, and C2 should be balanced within 10% on each side of the data bus to minimize common mode electromagnetic radiation.
A.2 A.3
A.4
A.5
A.6
A.7
A.8 A.9
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SAE J1708 Revised AUG2004
APPENDIX B
EXAMPLE BUS REACCESS PROCEDURE
B.1
A method for reaccessing the bus can be described by the following example:
B.1.1 Sequence of Events
a. First crash occurs for the current attempt to access the bus.
b. Each device wishing to access the bus then waits their predefined bus access time (as described in
5.2.2).
c. Second crash occurs for the same attempt to access the bus.
d. Any device that has experienced two consecutive crashes in its attempt to transmit the same
message shall follow the bus access procedure defined in 5.2.1 but with the bus access time calculated as follows:
Ta=Ti+[2∗Tb]∗[P2+1] (Eq. B1) where:
Ti and Tb are defined as in 5.2.1.1
P2 = A three-bit pseudo random number such as the three least significant bits of the stack pointer For example, if 18 is the location of stack pointer register, the contents of this register is the stack pointer. This value will be ANDED with 0007, which results in a number from 0 to 7, P2 would, therefore, be a value from 0 to 7.
e. If any more consecutive crashes occur, the procedure described in d is repeated. B.2
This example addresses the recognized possibility that two or more devices could continue to
crash if their priorities were the same. The previous method would greatly reduce the possibility of a third crash with the same device or devices.
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SAE J1708 Revised AUG2004
Rationale
The J1708 document was reviewed during the five year SAE review period and was revised to clarify some of the information. J2497 references were added. The document was re-formatted from the original outline. Metric references were added to the English units of measure. A datalink network topology diagram was added to clarify total cable length. A message string example was added. Relationship of SAE Standard to ISO Standard Not applicable. Application
This SAE Recommended Practice defines a recommended practice for implementing a bidirectional, serial communication link among modules containing microcomputers. This document defines those parameters of the serial link that relate primarily to hardware and basic software compatibility such as interface requirements, system protocol, and message format. The actual data to be transmitted by particular modules, which is an important aspect of communications compatibility, is not specified in this document. These and other details of communication link implementation and use should be specified in the separate application documents referenced in Section 2. Reference Section
SAE J1455—Joint SAE/TMC Recommended Environmental Practices for Electronic Equipment Design
(Heavy-Duty Trucks) SAE J1587—Joint SAE/TMC Recommended Practice for Electronic Data Interchange Between
Microcomputer Systems in Heavy-Duty Vehicle Applications SAE J1922—Powertrain Control Interface for Electronic Controls Used in Medium and Heavy-Duty Diesel
on Highway Vehicle Applications SAE J2497—Power Line Carrier Communications for Commercial Vehicles
EIA RS-485—Standard for Electrical Characteristics of Generators and Receivers for Use in Balanced
Digital Multipoint Systems, April 1983
Developed by the SAE Low Speed Communications Network Subcommittee
Sponsored by the SAE Truck and Bus Electrical and Electronics Committee
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