专利名称：Dynamic Data Dimensioning by Partial
Reconfiguration of Single or Multiple Field-Programmable Gate Arrays UsingBootstraps
发明人：Sreenivas Adiki,Ravi Kumar Reddy
Kanamatareddy,Siba P. Satapathy
申请号：US13947250申请日：20130722
公开号：US20150026450A1公开日：20150122
专利附图：
摘要：An approach is presented for managing resources of a field-programmablegate array (FPGA). At runtime, first data is extracted and processed. At runtime and via avery high speed integrated circuit hardware description language (VHDL) interface, achange in a size, a structure, or a load schedule of next data is received. The change isdetermined by a quantitative method analyzing the first data and executing external tothe FPGA. At runtime, a first bootstrap code in the FPGA executes, and in response, otherbootstrap codes in the FPGA are updated. The first bootstrap code is configured toupdate the structure of the next data. The other bootstrap codes are configured toextract and process, and to determine an order of processing and a configuration of thenext data. The next data is extracted and processed based on the updated otherbootstrap codes.
申请人：International Business Machines Corporation
地址：Armonk NY US
国籍：US
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