专利名称：Method of manufacturing a pattern of
conductive material
发明人：Woerlee, Pierre Hermanus,Verhoeven,
Johannes F. C. M.
申请号：EP84201431.8申请日：19841005公开号：EP0142186A2公开日：19850522
专利附图：
摘要：A method of providing narrow conductor tracks (metal silicide). According tothe invention, a pattern of polycrystalline silicon (3) covered by a protective layer (4) isconverted along the edges into silicide. This is effected in that the device is covered by asuitable metal (7) and is then silicidized laterally over a distance of 20-500 nm. Theremaining silicon (3) is removed selectively. The tracks (8) obtained can serve asconductor masks or, for example, as a plate of a capacitor.
申请人：Philips Electronics N.V.
地址：Groenewoudseweg 1 5621 BA Eindhoven NL
国籍：NL
代理机构：Rensen, Jan Geert
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