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A104SN03-V1-AUO-10.4寸显示屏规格书

2022-02-09 来源:爱问旅游网


CUSTOMER APPROVAL SHEET

Company Name

MODEL CUSTOMER

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AUO PM :

A104SN03 V1

Title : Name :

APPROVED

APPROVAL FOR SPECIFICATIONS ONLY (Spec. Ver. )

APPROVAL FOR SPECIFICATIONS AND ES SAMPLE (Spec. Ver. ) APPROVAL FOR SPECIFICATIONS AND CS SAMPLE (Spec. Ver. ) CUSTOMER REMARK :

Comment :

P/N :

1 Li-Hsin Rd. 2. Science-Based Industrial Park

Hsinchu 300, Taiwan, R.O.C.

Tel: +886-3-500-8899 Fas: +886-3-577-2730

Doc. version : 0.7 Total pages : 34 Date : 2009/04/27

10.4\" COLOR TFT-LCD MODULE

Model Name: Planned Lifetime: Phase-out Control: EOL Schedule: A104SN03 V1

Product Specification

From 2008/Dec To 2010/Dec From 2010/Jul To 2010/Dec 2010/Dec

ary Specification

< >Final Specification

Note: The content of this specification is subject to change. © 2009 AU Optronics All Rights Reserved, Do Not Copy.

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Version:

Version Revise Date 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 2008/10/29 2008/11/12

2009/01/07

2009/1/16

2009/02/04 2009/03/15

2009/03/31 2009/4/27

Record of Revision

Page All 24 29 4 17 18 4 10 32 8 12 22 33 25 19

First Draft

Update Response time Update drawing Update drawing Update Register Table Delete R1 setting Update drawing

Delete extra Electrical DC Characteristics Add Application Circuit Delete extra note Add VCOMin Delete Power on R1 Update Application Circuit Update Contrast ratio

Update Register Table & Register Description

Content

Page:

0.7 1/34

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A. B. C.

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0.7 2/34

General Information.....................................................................................................................................3 1.

Outline Dimension.......................................................................................................................................4 Electrical Specifications.............................................................................................................................6

TFT-LCD Module...................................................................................................................................4

Contents

1. TFT LCD Panel Pin Assignment.................................................................................................................6 2. Backlight Pin Assignment............................................................................................................................9 3. Absolute Maximum Ratings.........................................................................................................................9 3. Electrical DC Characteristics.....................................................................................................................10 4. Electrical AC Characteristics.....................................................................................................................14 5. Serial Interface Characteristics.................................................................................................................17 6. Power On/Off Characteristics....................................................................................................................22 Optical Specification.................................................................................................................................25 Reliability Test Items.................................................................................................................................28 1. Packing Form............................................................................................................................................31 2. Module/Panel Label Information...............................................................................................................32 3. Carton Label Information...........................................................................................................................32 Application Circuit..........................................................................................................................................33 Precautions................................................................................................................................................34 Application Note........................................................................................................................................33 Packing and Marking.................................................................................................................................31

D. E. F.

G. H.

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A. General Information

NO. 1 2 3 4 5 6 7 8 10 11 12 13 14 9 Item Unit inch mm dot Specification Remark This product is for portable DVD and digital photo frame application.

Screen Size Display Resolution Overall Dimension Active Area Pixel Pitch Color Configuration Color Depth NTSC Ratio mm -- -- -- g mm 228.4(W)x175.4(H)x6.2(D) 0.264(W)x0.264(H) R. G. B. Stripe 16.7M Colors 50 211.2(W)x158.4(H) 800RGB(W)x600(H) 10.4(Diagonal) Note 1 Panel surface Treatment Panel Power Consumption Viewing direction Weight Display Mode % -- Note 3 Note 2 Normally White Anti-Glare, 3H 400±20 2.97 0.43 Backlight Power Consumption W W Note 4 Note 1: Not include blacklight cable and FPC. Refer next page to get further information. Note 2: Below figure shows dot stripe arrangement. R R G G B B ………………………………. R G …………… B 6 o’clock (gray inversion)

( 1…………...……………..600 )

R ( 1 2 3….……… ………..……………. .............2398 2399 2400) Note 3: The full color display depends on 24-bit data signal (pin 4~27). Note 4: Please refer to Electrical Characteristics chapter.

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……… ………G B ………………………………. R G B

473./04 :no :isergaVeP eludo MDCL-TFT .1 SMROF REHTO YNA OT DEMROFSNART RO ,DEIPOC ,DECUDORPER EB TON LLAHS REPAP S IHP.TR FOOC SNCOIINTROROTPP YO NUAA .MDEOVRRF ENSOEIRSS IYLMTRCEIRP TTSU OSHTTHIGW IR LLAB. Outline Dimension 473./05 :no :isergaVeP SMROF REHTO YNA OT DEMROFSNART RO ,DEIPOC ,DECUDORPER EB TON LLAHS REPAP S IHP.TR FOOC SNCOIINTROROTPP YO NUAA .MDEOVRRF ENSOEIRSS IYLMTRCEIRP TTSU OSHTTHIGW IR LLA Version:

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C. Electrical Specifications

1. TFT LCD Panel Pin Assignment

Pin no 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 9 Symbol AGND AVDD R0 R1 R2 R3 R4 R5 R6 R7 I/O

Recommended connector : HRS FH28-60S-0.5SH

P Ground for analog circuit Description

Remark

VDDIO P Analog power supply voltage I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I Red data input (LSB) Red data input Red data input Red data input Red data input Red data input Red data input P Digital interface supply voltage G0 G1 G2 G3 G4 G5 G6 G7 B0 B1 B2 B3 B4 B5 B6 DCLK HSYNC VSYNC SDA CSB SCL DE B7 Red data input (MSB) Green data input Green data input Green data input Green data input Green data input Green data input Green data input (LSB) Green data input (MSB) Blue data input (LSB) Blue data input Blue data input Blue data input Blue data input Blue data input Blue data input Blue data input (MSB) Data clock input Data enable signal Horizontal sync input. (Negative polarity) Vertical sync input. (Negative polarity) Serial communication clock input Serial communication data input Serial communication chip select ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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VDDIO GND NC NC P Digital interface supply voltage P Ground for digital circuit - - Page:

For test, do not connect (Please leave it open) For test, do not connect (Please leave it open) 0.7 7/34

35 36 37 38 39 40 41 AGND VCOMin AVDD P Ground for analog circuit I P Analog power supply voltage For external VCOM DC input Dithering setting turncated)

DITH = \"L\" 6bit resolution(LSB last 2 bits of input data DITH = \"H\" 8bit resolution(Default setting)

42 DITH I

43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

VCOM V10 V9 V8 V7 V6 V5 V4 V3 V2 NC V1 NC O connect a capacitor I I I I I I I I I - I - For test, do not connect (Please leave it open) Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference Gamma correction voltage reference For test, do not connect (Please leave it open)

VDDIO VGL GND NC VGH P Positive power for TFT P Digital interface supply voltage P Ground for digital circuit - P Negative power supply for Gate driver. For test, do not connect (Please leave it open) I: Input; P: Power ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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.

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2. Backlight Pin Assignment

Pin no 1 2 Symbol VLED+ VLED- I/O P P Recommended connector : JOIN TEK JT1025-1021

Backlight LED anode Description Remark

Backlight LED cathode 3. Absolute Maximum Ratings Item

Symbol VDDIO AVDD

Power voltage

VGH VGL VGH-VGL Input signal voltage

Operating Storage

VI VCOMin Topa Tstg

ConditioGND=0 AGND=0 GND=0

Min. -0.5 -0.5 -0.3 -20 - -0.3 0 -10 -20

Max. 5 15 42 0.3 40

Unit V V

Remark Digital Power Supply Analog power supply

V Gate driver supply voltage V Gate driver supply voltage V Gate driver supply voltage Note 1 VCOM DC Voltage

VDDIO+0.3 V

5 60 70

V

Note 1: Functional operation should be restricted under ambient temperature

Note 2: Maximum ratings are those values beyond which damages to the device may occur.

Functional operation should be restricted to the limits in the Electrical Characteristics chapter.

.

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3. Electrical DC Characteristics

a. Typical Operation Condition (AGND =GND = 0V)

Item Symbol VDDIO AVDD VGH VGL

Signal Voltage L Level Gamma reference VCOMin voltage Input H Level VIH V1 ~ V5 VCDC VIL Min. 3.0 10.5 14 -7.5 0.7xVDDIO AVDD/2 3.75 1 GND Typ. 3.3 11 15 -7 -- - Max. 3.6 11.5 16 -6.5 VDDIO Unit V V V V V Remark Digital Power Supply Analog Power Supply Positive power supply for gate Negative power supply for gate driver

Note 1 Note 2 driver

Power Voltage

-- - 0.3xVDDIO AVDD – 1 AVDD/2 4.15 V V V V6 ~ V10 Note 1: Gamma suggested circuit is as follows

3.95 V ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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Pin AVDD V1 V2 V3 V4 V5 V6 V7 V8 V9 V10

Voltage(V)

11 10 8.5 8 7.57 6.7 4.3 3.43 3 2.5 1

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Note2: Based on recommended Gamma 2.2 voltage.

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b. Current Consumption (AGND=GND=0V)

Parameter Symbol IVDDIO IAVDD IVGH IVGL

Input current for VDDIO Input current for AVDD Input current for VGH Input current for VGL

Condition Min. -- -0.6

Typ. 10 24 0.4 -0.4

Max. 20 30 0.6 --

Unit mA mA mA mA

Remark Note 1, 2 Note 1, 2 Note 1, 2 Note 1, 2

VDDIO = 3.3V AVDD = 11V VGH = 15V VGL = -7V

Note 1:Test Condition is under typical Eletrical DC and AC characteristics. Note 2: Test pattern is the following picture.

c. Backlight Driving Conditions

Parameter Symbol P IL The backlight (LED module, Note 1) is suggested to drive by constant current with typical value. LED light bar Current Power Consumption LED Life Time Min. -- -- Typ. 300 3 -- Max. 3.21 -- -- Unit mA Hr W Remark Note 1 LL 10,000 Note 2, 3 Note 1: The LED driving condition is defined for LED module (36 LED). The Voltage range will be 8.8V to 10.7V based on suggested driving current set as 300mA.

Note 2: Define “LED Lifetime”: brightness is decreased to 50% of the initial value. LED Lifetime is

300mA.

restricted under normal condition, ambient temperature = 25℃ and LED lightbar current =

Note 3: If it uses larger LED lightbar current more than 300mA, it maybe decreases the LED lifetime.

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4. Electrical AC Characteristics

a. Signal AC Characteristics

Parameter DCLK duty cycle VSYNC setup time VSYNC hold time HSYNC setup time HSYNC hold time Data setup time Data hold time Data enable set-up time

Data enable hold time -- tvst tvhd thst thhd tdst tdhd test tehd Symbol Min. 40 0 2 5 10 5 10 4 2 Typ. 50 -- -- -- -- -- -- -- -- Max. 60 -- -- -- -- -- -- -- -- Unit % ns ns ns ns ns ns ns ns Remark tcw / tDCLK x100% ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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b. Input Timing

THHSDCLK

THFTHWTHBTHER[7:0]G[7:0]B[7:0]

Rn-1Gn-1Bn-1RnGnBnInvalidInvalidInvalidTHBLR0G0B0R1G1B1R2G2B2R3G3B3THDRn-1Gn-1Bn-1RnGnBnInvalidInvalidInvalid Horizontal input timing. (HV mode)

THBL

THDDEDCLKR[7:0]G[7:0]B[7:0]

Rn-1Gn-1Bn-1RnGnBnInvalidInvalidInvalidR0G0B0R1G1B1R2G2B2R3G3B3Rn-1Gn-1Bn-1RnGnBnInvalidInvalidInvalidHorizontal Timing

Parameter DCLK frequency DCLK period

Hsync period (= THD + THBL)

Active Area

Horizontal blanking (= THF + THE)

Hsync front porch

Delay from Hsync to 1st data input

(= THW + THB)

Horizontal input timing. (DE mode) Symbol FDCLK TDCLK TH THD THBL THF THE

Min. 25 22 1026 - 226 10

Typ. 40 25 1056 800 256 40 216

Max. 45 40 1183 - 383 167

Unit. MHz ns DCLK DCLK DCLK DCLK DCLK

Remark

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Hsync pulse width Hsync back porch

THW THB

1 80

128 88

136 215

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Horizontal input timing (HV mode)

Vertical Timing

Parameter

Vsync period (= TVD + TVBL)

Active lines

Vertical blanking (= TVF + TVE)

Vsync front porch GD start pulse delay Vsync pulse width Hsync/Vsync phase shift

Horizontal input timing (DE mode) Symbol TV TVD TVBL TVF TVE TVW TVPD

Min. - - - - - 1 2

Typ. 628 600 28 1 27 3 320

Max. 635 - 35 8 - 16 -

Unit. Th Th Th Th Th Th DCLK

Remark

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Vertical timing (HV mode)

Vertical timing (DE mode)

5. Serial Interface Characteristics

a. Serial Control Interface AC Characteristic

Parameter Serial data setup time Serial data hold time CSB setup time CSB hold time Serial clock high/low Serial clock Delay from CSB to VSYNC Chip select distinguish Serial data output delay Symbol TIST TIHD TCST TCHD TSSW TSCK TCV TCD TID Min. 120 120 120 120 120 320 1 1 - Typ. - - - - - - - - - Max. - - - - - - - - 60 Unit. ns ns ns ns ns ns us us ns Remark CL=20pF ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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There is a total of 6 registers each containing several parameters. For a detailed description of the parameters refer to register table. The serial register has read/write function. D[15:12] are the register address, D[11] defines the read or write mode and D[10:0] are the data.

b Serial Interface Timing

Serial Interface Write sequence

1. At power-on, the default values specified for each parameter are taken.

a.

The write operation is cancelled.

2. If less than 16-bit data are read during the CS low time period, the data is cancelled. 3. All items are set at the falling edge of the vertical sync, except R0[1:0].

4. When GRB is activated through the serial interface, all registers are cleared, except the GRB value. 5. The register setting values are valid when VCC already goes to high and after VSYNC starts. only VSYNC operating, the register setting is still valid. changing standby mode value from low to high.

6. It is suggested that VSYNC, HSYNC, DCLK always exists in the same time. But if HSYNC, DCLK stops, 7. If the chip goes to standby mode, the register value will still keep. MCU can wake up the chip only by

8. The register setting values are rewritten by the influence of static electricity, a noise, etc. to unsuitable value,

incorrect operating may occur. It is suggested that the SPI interface will setup as frequently as possible.

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R/W DATA D5 (0)

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Reg c. Register Table (Default Value)

ADDRESS D9 D8 (01) × (0) (1) (0) (0) (1)

(0) (0) D7 D6 (1)

No. D15 D14 D13 D12 D11 D10 R0 0 R2 0 R3 0 R4 0 R6 0

0 0 0 1 1

0 1 1 0 1

0 0 1 0 0

0 0 0 0 0

× × × ×

D4 (1) HDL D3 (1)

D2 (0)

(01)

× × × (0)

GRB (1)

D1 STB (1)

D0 (80h)

(0) (0) (0)

(0) (1) (0)

EnGB12 EnGB11 EnGB10 (1)

(1)

EnGB5 EnGB4 EnGB3 (1)

(1)

(1)

(1111) (1000)

VDL (0)

X: Reserved. Please set to “0”.

:Sending serial commands periodically is recommended to improve ESD protection ability.

a. R0 setting 0000 Bit6 Address d. Register Description

Bit Description Default 01 01 1 0 1 1 0 1 1

[10..0]

Bits 10-9 Bits7-8

AUO Internal Use AUO Internal Use Dithering function. AUO Internal Use AUO Internal Use AUO Internal Use. AUO Internal Use Global reset.

Standby mode setting.

Bit6 (DITH) Bit5 Bit4 Bit3 Bit2 Bit1 (GRB) Bit0 (STB) DITH function 0

1 DITH off. DITH on. (default) GRB function 0

1 Bit1 The controller is reset. Reset all registers to default value. Normal operation. (default) STB function 0

1 Bit0 Normal operation. (default) T-CON and source driver are off. All outputs are set to GND. ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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b. R2 setting 0010 Address

Description Page:

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[7..0] Bit Bit7-0(HDL) HDL function Horizontal start pulse adjustment function 80H Default 00h 80h

Bit7-0 THE = THEtyp - 128 CLK period. THE = THEtyp. (default) THE = THEtyp + 127 CLK period. FFh c. R3 setting 0011 Address [8..0]

Bit Bit8 Bit7 Bit6 Bit5 Bit4

Description AUO Internal Use AUO Internal Use AUO Internal Use AUO Internal Use AUO Internal Use

Vertical start pulse adjustment function

0 0 Default 0 0 0 1000

Bit3-0(VDL)

0000 0001 0010 0011 0100 0101 0110 0111 Bit3-0 TVE = TVEtyp – 8 Hs period. TVE = TVEtyp – 7 Hs period. TVE = TVEtyp – 6 Hs period. TVE = TVEtyp – 5 Hs period. TVE = TVEtyp – 4 Hs period. TVE = TVEtyp – 3 Hs period. TVE = TVEtyp – 2 Hs period. TVE = TVEtyp – 1 Hs period. TVE = TVEtyp. (default) TVE = TVEtyp – 1 Hs period. TVE = TVEtyp – 2 Hs period. TVE = TVEtyp – 3 Hs period. TVE = TVEtyp – 4 Hs period. TVE = TVEtyp – 5 Hs period. TVE = TVEtyp – 6 Hs period. TVE = TVEtyp – 7 Hs period. VDL function 1000 1001 1010 1011 1100 1101 1110

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d. R6 setting 0110 Address

Description Page:

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[9..0] Bit Bits9 AUO Internal Use Default 0 1 1 1 0 0 1 1 1 0 Bits8(EnGB12) Gamma buffer Enable for V9 Bits7(EnGB11) Gamma buffer Enable for V8 Bits6(EnGB10) Gamma buffer Enable for V7 Bits5 Bits4 Bits3(EnGB5) Bits2(EnGB4) Bits1(EnGB3) Bits0 AUO Internal Use AUO Internal Use

Gamma buffer Enable for V4 Gamma buffer Enable for V3 Gamma buffer Enable for V2 AUO Internal Use 0

1 Bitx Gamma buffer for VX is disabled (High Z). EnGBx function Gamma buffer is enabled. VX must be connected externally. ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED,

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6. Power On/Off Characteristics

a. Recommended Power On Register Setting

ADDRESS

R/W

D10

D9

D8

D7

D6

DATA D5

D4

D3

D2

D1

D0

Reg

No. D15 D14 D13 D12 D11

R0 R2 R3 R4 R6 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 1 1 01 1 0 1 80h 0 0 1 1 0 1 1 0 00 1 0 0 1 1000 1111 1 1 1 0 0 0 0 Note : Start to provide SPI commend at least after 2 frame. 1. Send R15 : 000h(Normal register bank) at first.

2. Wait at least after more than one frame, send R0 : 4D1h(Global Reset)

3. After send Global Reset, start to send R0 to R6 recommend register value.

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FORMS WITHOUT 4 37/.302 :no :isergaVeP REHTO YNA OT DEMROFSNART RO ,DEIPOC ,DECUDORPER EB TON LLAHS REPAP SIHT FO N OP.ITRROOC PS YCINNAO .RDTEPVOR EUSA EMRO YRLFT CNIORITSSSI SMTRHEGP IR LLAb. Recommended Power On Sequence 4 37/.402 :no :isergaVeP TUOHTIW S MROF REHTO YNA OT DEMROFSNART RO ,DEIPOC ,DECUDORPER EB TON LLAHS REPAP SIHT FO N OP.ITRROOC PS YCINNAO .RDTEPVOR EUSA EMRO YRLFT CNIORITSSSI SMTRHEGP IR LLAc. Power Off Sequence Version:

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D. Optical Specification

Item Rise Fall All optical specification is measured under typical condition (Note 1, 2)

Symbol Tr Tf CR Condition θ=0° viewing angle At optimized

Min. -- -- 400 40

50 65 65

YL White Red

Chromaticity

Green Blue

Uniformity X Y X Y X Y X Y ΔYL θ=0° θ=0° θ=0° θ=0° θ=0° θ=0° θ=0° θ=0° θ=0° % Response Time Typ. 30 500 50 60 75 75

Max. 7 Unit Remark ms ms Note 3 Note 4

33 -- -- -- -- -- 0.38 0.40 0.650 0.424 0.406 0.631 0.194 0.143 -- Contrast ratio

Top Viewing Angle

Bottom Left Right

deg. Note 5

Brightness 250 0.28 0.30 0.550 0.324 0.306 0.531 0.094 0.043 75 300 0.33 0.35 0.600 0.374 0.356 0.581 0.144 0.093 80 cd/m2 Note 6 Note 7 -- Note 1: Ambient temperature =25℃, and LED lightbar current IL = 300mA. To be measured in the dark room. BM-5A, after 15 minutes operation.

Note 2: To be measured on the center area of panel with a viewing cone of 1° by Topcon luminance meter

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Note 3: Definition of response time:

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The output signals of photo detector are measured when the input signals are changed from The response time is defined as the time interval between the 10% and 90% of amplitudes. Refer to figure as below.

“black” to “white”(falling time) and from “white” to “black”(rising time), respectively.

100%90%\"White\"\"Black\"\"White\"10%0%TrTf

Note 4.Definition of contrast ratio:

Contrast ratio (CR)=

Contrast ratio is calculated with the following formula.

Photo detector output when LCD is at \"White\" status

Photo detector output when LCD is at \"Black\" status

Note 5. Definition of viewing angle, θ, Refer to figure as below.

Note 6. Measured at the center area of the panel when all the input terminals of LCD panel are Note 7: Luminance Uniformity of these 9 points is defined as below:

electrically opened.

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Uniformity=

minimum luminance in 9 points (1-9)maximum luminance in 9 points (1-9)

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E. Reliability Test Items No. 1 2 3 4 5 6 7 8 Test items High Temperature Storage Low Temperature Storage High Ttemperature Operation Low Temperature Operation High Temperature & High Humidity

Heat Shock Electrostatic Discharge

Image Sticking Stoke

9

Vibration

Tp

Conditions

240Hrs

Ta= -2Tp=

240Hrs

Remark

240Hrs

Ta=-1

240Hrs 240Hrs

Operation

-

Non-operation

Note 5 Note 6

Contact = ± 4 kV, class B Air = ± 8 kV, class B

25Frequency range Sweep

4hrs

: 10~55Hz : 1.5mm : 10 ~ 55 ~ 10Hz

JIS C7021, A-10 : 15 minutes

Non-operation JIS C7021,

A-7 condition A

Non-operation 2 hours for each direction of X,Y,Z

(6 hours for total) 100G . 6ms, ±X,±Y,±Z

10 Mechanical Shock

3 times for each direction

Random vibration: 2

condition C IEC 68-34

11 Vibration (With Carton)

–6dB/Octave from 200~500Hz 1 corner, 3 edges, 6 surfaces

5kg, 5sec Height: 60cm

0.015G/Hz from 5~200Hz

12 13

Drop (With Carton)

Pressure

Note 7

Note 1: Ta: Ambient Temperature. Tp: Panel Surface Temperature specification is judged before the reliability stress.

Note 2: In the standard conditions, there is not display function NG issue occurred. All the cosmetic Note 3: All the cosmetic specification is judged before the reliability stress. Note5 : All test techniques follow IEC6100-4-2 standard.

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Note Test Condition Pattern Air Discharge:330Ω, 150pF, 1sec, 8 point, 10times/point Contact Discharge:330Ω, 150pF, 1sec, 8 point, 10times/point Procedure Set-up And Criteria B – Some performance degradation allowed. No data lost. Self-recoverable hardware failure. Note 6: Operate with chess board pattern as figure and lasting time and temperature as the conditions. Then judge with 50% gray level, the mura is less than JND 2.5

Note 7: The panel is tested as figure. The jig isψ10 mm made by Cu with rubber and the loading

function check is OK.( no guarantee LC mura、LC bubble)

speed is 3mm/min on position A~E. After the condition, no glass crack will be found and panel

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LoadingLCM

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F. Packing and Marking

1. Packing Form

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2. Module/Panel Label Information

which represents the identification of the Product at a specific location. Refer to the Product outline drawing for detailed location and size of the label. The label is composed of a 22-digit serial number and printed with code 39/128 with the following definition:

The module/panel (collectively called as the “Product”) will be attached with a label of Shipping Number

Example:

501M06ZL06123456781Z05: Product Version: Version 1

Product Manufacturing Week Code: WK50 Product Manufactuing Factory: M06

3. Carton Label Information

Number, Customer Part Number (Optional) and a series of Carton Number in 13 or 14 digits are printed. The Carton Number is apparing in the following format:

The packing carton will be attached with a carton label where packing Q’ty, AUO Model Name, AUO Part

Refer to the drawing of packing format for the location and size of the carton label.

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OR TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.

4 37/.303 :no :isergaVeP tiucriC noitacilppA TUOHTIW SMROF REHTO YNA OT DEMROFSNART RO ,DEIPOC ,DECUDORPER EB TON LLAHS REPAP SIHT FO N OP.ITRROOC PS YCINNAO .RDTEPVOR EUSA EMRO YRLFT CNIORITSSSI SMTRHEGP IR LLAG. Application Note Version:

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H. Precautions

assembly.

1. Do not twist or bend the module and prevent the unsuitable external force for display module during 2. Adopt measures for good heat radiation. Be sure to use the module with in the specified temperature. 3. Avoid dust or oil mist during assembly.

4. Follow the correct power sequence while operating. Do not apply the invalid signal, otherwise, it will 5. Less EMI: it will be more safety and less noise.

temperature.

cause improper shut down and damage the module.

6. Please operate module in suitable temperature. The response time & brightness will drift by different 7. Avoid to display the fixed pattern (exclude the white pattern) in a long period, otherwise, it will cause 8. Be sure to turn off the power when connecting or disconnecting the circuit. 9. Polarizer scratches easily, please handle it carefully. 10. Display surface never likes dirt or stains.

image sticking.

11. A dewdrop may lead to destruction. Please wipe off any moisture before using module.

12. Sudden temperature changes cause condensation, and it will cause polarizer damaged.

direct sunlight and so on.

13. High temperature and humidity may degrade performance. Please do not expose the module to the 14. Acetic acid or chlorine compounds are not friends with TFT display module.

device.

15. Static electricity will damage the module, please do not touch the module without any grounded 16. Do not disassemble and reassemble the module by self. 17. Be careful do not touch the rear side directly.

18. No strong vibration or shock. It will cause module broken. 20. Be careful of injury from a broken display module.

the display non-uniformity or other function issue.

19. Storage the modules in suitable environment with regular packing.

21. Please avoid the pressure adding to the surface (front or rear side) of modules, because it will cause 22. Please use SSCG(Spread Spectrum Clock Generator) at system for EMI reduction.

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OR TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.

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