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M5M5V408BRT-85LW资料

2023-02-06 来源:爱问旅游网
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revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

DESCRIPTION

The M5M5V408B is a family of low voltage 4-Mbit static RAMsorganized as 524,288-words by 8-bit, fabricated by Mitsubishi's high-performance 0.25µm CMOS technology.

The M5M5V408B is suitable for memory applications where asimple interfacing , battery operating and battery backup are theimportant design objectives.

M5M5V408B is packaged in 32-pin plastic SOP, 32-pin plasticTSOP and 32-pin 8mm x 13.4mm STSOP packages. Two types ofTSOPs and two types of STSOPs are available, M5M5V408BTP(normal-lead-bend TSOP), M5M5V408BRT (reverse-lead-bendTSOP), M5M5V408BKV (normal-lead-bend STSOP) andM5M5V408BKR (reverse-lead-bend STSOP). These two typesTSOPs and two types STSOPs are suitable for a surface mountingon double-sided printed circuit boards.

From the point of operating temperature, the family is divided intothree versions; \"Standard\W-version\I-version\". Those aresummarized in the part name table below.

FEATURES

• Single +2.7~+3.6V power supply• Small stand-by current: 0.3µA(3V,typ.)• No clocks, No refresh

• Data retention supply voltage=2.0V to 3.6V• All inputs and outputs are TTL compatible.• Easy memory expansion by S• Common Data I/O

• Three-state outputs: OR-tie capability

• OE prevents data contention in the I/O bus• Process technology: 0.25µm CMOS• Package:

M5M5V408BFP: 32 pin 525 mil SOP

M5M5V408BTP/RT: 32 PIN 400mil TSOP(ll)

M5M5V408BKV/KR: 32 pin 8mm x13.4mm STSOP

PARTNAMETABLE

Version,Operatingtemperature

Partname

(## stands for \"FP\

\"RT\M5M5V408B## -85LM5M5V408B## -10LM5M5V408B## -85HM5M5V408B## -10HM5M5V408B## -85LW

PowerSupply

2.7 ~ 3.6V2.7 ~ 3.6V2.7 ~ 3.6V2.7 ~ 3.6V2.7 ~ 3.6V2.7 ~ 3.6V

AccesstimeStand-by current Icc(PD), Vcc=3.0Vtypical*Ratings(max.)25°C40°C25°C40°C70°C85°C---------1µA---1µA---1µA

---3µA---3µA---3µA

20µA10µA

------

max.

85ns100ns

85ns100ns85ns100ns85ns100ns85ns100ns85ns100ns

ActivecurrentIcc1 (3.0V, typ.)Standard0 ~ +70°C

0.3µA1µA------

W-version-20~ +85°C

M5M5V408B## -10LWM5M5V408B## -85HWM5M5V408B## -10HWM5M5V408B## -85LI

20µA40µA10µA20µA20µA40µA10µA20µA

30mA(10MHz)5mA(1MHz)

0.3µA1µA------

I-version-40 ~ +85°C

M5M5V408B## -10LIM5M5V408B## -85HIM5M5V408B## -10HI

0.3µA1µA

* \"typical\" parameter is sampled, not 100% tested.

MITSUBISHIELECTRIC1元器件交易网www.cecb2b.com

revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

PINCONFIGURATION(TOPVIEW)

A18A16A14A12A7A6A5A4A3A2A1A0DQ1DQ2DQ3GND

1234567891011121314151632313029282726252423222120191817VCCA15A17WA13A8A9A11OEA10SDQ8DQ7DQ6DQ5DQ4VCCA15A17WA13A8A9A11OEA10SDQ8DQ7DQ6DQ5DQ4

3231302928272625242322212019181712345678910111213141516A18A16A14A12A7A6A5A4A3A2A1A0DQ1DQ2DQ3GND

Outline

32P2M-A (FP)32P3Y-H (TP)

Outline32P3Y-J (RT)

A11A9A8A13WA18A15VccA17A16A14A12A7A6A5A4

1234567891011121314151632313029282726252423222120191817OEA10SDQ8DQ7DQ6DQ5DQ4GNDDQ3DQ2DQ1A0A1A2A3

A4A5A6A7A12A14A16A17VccA15A18WA13A8A9A11

1615141312111098765432117181920212223242526272829303132A3A2A1A0DQ1DQ2DQ3GNDDQ4DQ5DQ6DQ7DQ8SA10OEOutline 32P3K-B

Outline 32P3K-C

MITSUBISHIELECTRIC2revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

FUNCTION

The M5M5408BFP,TP,RT,KV,KR is organized as 524,288-words by 8-bit. These devices operate on a single +2.7~3.6Vpower supply, and are directly TTL compatible to both inputand output. Its fully static circuit needs no clocks and norefresh, and makes it useful.

A write operation is executed during the S low and W lowoverlap time. The address(A0~A18) must be set up beforethe write cycle

A read operation is executed by setting W at a high leveland OE at a low level while S are in an active state(S=L).When setting S at a high level, the chips are in a non-selectable mode in which both reading and writing aredisabled. In this mode, the output stage is in a high-impedancestate, allowing OR-tie with other chips. Setting the OE at a highlevel,the output stage is in a high-impedance state, and thedata bus contention problem in the write cycle is eliminated.The power supply current is reduced as low as 0.3µA(25°C,typical), and the memory data can be held at +2V powersupply, enabling battery back-up operation during power failureor power-down operation in the non-selected mode.

FUNCTIONTABLE

SHLLLWXLHHOEXXLHModeNon selectionWriteReadReadDQHigh-impedanceData input (D)Data output (Q)High-impedanceIccStandbyActiveActiveActivePinA0 ~ A18

SWOEVccGND

FunctionAddress inputChip select inputWrite control inputOutput inable inputPower supplyGround supply

DQ1 ~ DQ8Data input / output

BLOCKDIAGRAM

M5M5V408BFP/TP/RTM5M5V408BKV/KR16151413121110967M5M5V408BKV/KRA4A5A6A7A12A14A16A17A18A15A10A11A9A8A13876543230131M5M5V408BFP/TP/RT13141517181920212122MEMORY ARRAY524288 WORDSx 8 BITS232526272829DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ82325262728311234530292224CLOCKGENERATORWSOEVCC(3V)A0A1A2A3121110920191817328322416GND(0V)MITSUBISHIELECTRIC3元器件交易网www.cecb2b.com

revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

ABSOLUTEMAXIMUMRATINGS

Symbol

ParameterSupply voltageInput voltageOutput voltagePower dissipationOperatingtemperatureStorage temperatureConditions

With respect to GNDWith respect to GNDWith respect to GNDTa=25°CStandardW-versionI-version

(-L, -H)(-LW, -HW)(-LI, -HI)

Ratings

Units

VccVIVOPdTaTstg

-0.5* ~ +4.6-0.5* ~ Vcc + 0.5

0 ~ Vcc 7000~ +70-20~ +85-40~ +85-65 ~150

VmW°C°C

* -3.0V in case of AC (Pulse width ≤ 30ns)

DCELECTRICALCHARACTERISTICS

SymbolParameterHigh-level input voltageLow-level input voltage

High-level output voltage 1IOH= -0.5mAHigh-level output voltage 2IOH= -0.05mALow-level output voltageInput leakage currentOutput leakage currentActive supply current

( AC,MOS level )Active supply current

( AC,TTL level )

Conditions

( Vcc=2.7 ~ 3.6V, unless otherwise noted)

Limits

Min

Typ

MaxVcc+0.3V

Units

VIHVILVOH1VOH2VOLIIIOIcc1Icc2

2.2-0.3 *2.4Vcc-0.5V

0.6

V

0.4±1±1

IOL=2mAVI =0 ~ Vcc

S=VIHor OE=VIH, VI/O=0 ~ Vcc

S ≤0.2VOutput-open

Other inputs ≤0.2V or ≥Vcc-0.2VOutput-openS=VIL

Other inputs=VIHor VIL

f= 10MHzf= 1MHzf= 10MHzf= 1MHz

µA

-------------

-LW, -LI+70~ +85°C

+70°C-L, -LW, -LI

Stand by supply current

( AC,MOS level )

-HW, -HI+70~ +85°C

S ≥Vcc-0.2V+40 ~ +70°C

-H, -HW, -HI

Other inputs=0~Vcc+25~ +40°C

-H0~ +25°C

-HW-HI

Stand by supply current

( AC,TTL level )

-20~ +25°C-40~ +25°C

Icc3

305305----10.30.30.3-

407407482424123.61.21.21.20.5

mA

µA

Icc4

S=V,Other inputs= 0 ~ Vcc

mA

Note 1: Direction for current flowing into IC is indicated as positive (no mark)Note 2: Typical value is for Vcc=3.0V and Ta=25°C

* -3.0V in case of AC (Pulse width ≤ 30ns)

CAPACITANCE

SymbolParameterInput capacitanceOutput capacitance

Conditions

VI=GND, VI=25mVrms, f=1MHzVO=GND,VO=25mVrms, f=1MHz

(Vcc=2.7 ~ 3.6V, unless otherwise noted)

LimitsTypMax

Units

Min

CI

CO

810

pF

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revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

ACELECTRICALCHARACTERISTICS(1)TESTCONDITIONS

Supply voltageInput pulse

Input rise time and fall timeReference level

(Vcc=2.7 ~ 3.6V, unless otherwise noted)

2.7V~3.6V

VIH=2.4V,VIL=0.4V5ns

VOH=VOL=1.5V

Transition is measured ±500mV from steady state voltage.(for ten,tdis)

1TTLDQ

CLIncluding scope andjig capacitance

Output loads

Fig.1,CL=30pF

CL=5pF (for ten,tdis)

Fig.1 Output load

(2)READCYCLE

Limits

Symbol

Parameter

Read cycle time

Address access timeChip select access timeOutput enable access timeOutput disable time after S highOutput disable time after OE highOutput enable time after S lowOutput enable time after OE lowData valid time after address

M5M5V408BFP,TP,RT,KV,KR-85M5M5V408BFP,TP,RT,KV,KR-10

Units

Min

MaxMinMax

tCR ta(A) ta(S) ta(OE) tdis(S) tdis(OE) ten(S) ten(OE) tV(A)

85

8585453030

10510

100

100100503535

10510nsnsnsnsnsnsnsnsns

(3)WRITECYCLE

Limits

Symbol

Parameter

Write cycle timeWrite pulse widthAddress set up time

Address set up time with respect to W highChip select set up time Data set up timeData hold time

Write recovery time

Output disable time after W lowOutput disable time after OE highOutput enable time after W highOutput enable time after OE lowM5M5V408BFP,TP,RT,KV,KR-85M5M5V408BFP,TP,RT,KV,KR-10

Units

MinMaxMinMax

tCWtw(W) tsu(A) tsu(A-WH) tsu(S) tsu(D) th(D) trec(W) tdis(W) tdis(OE) ten(W) ten(OE)

8560070703500

3030

55

10075085854000

3535

55nsnsnsnsnsnsnsnsnsnsnsns

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revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

(4)TIMINGDIAGRAMS

ReadcycleA0~18

ta(A)ta(S)S

(Note3)tCRtv (A)tdis(S) ta (OE)(Note3)OE

(Note3)W = \"H\" levelten(OE)ten(S)tdis(OE)(Note3)DQ1~8

VALID DATAWritecycle(Wcontrolmode)

tCWA0~18

tsu(S)S

(Note3)tsu(A-WH)(Note3)OE

tsu (A)W

tw(W)trec(W)tdis(W)tdis(OE)DQ1~8

DATA INSTABLEten(OE)ten(W)tsu (D)th (D)MITSUBISHIELECTRIC6元器件交易网www.cecb2b.com

revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

Writecycle(Scontrolmode)

tCWA0~18

tsu (A)S

tsu(S)trec(W)(Note5)W

(Note3)(Note4)(Note3)tsu (D)DATA INSTABLEth (D)DQ1~8

Note 3: Hatching indicates the state is \"don't care\".

Note 4: A Write occurs during the overlap of a low S and a low W.Note 5: If W goes low simultaneously with or prior to S,the output remains in the high impedance state.Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode.

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revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

POWERDOWNCHARACTERISTICS(1)ELECTRICALCHARACTERISTICS

Symbol

Parameter

Test conditions

LimitsMin Typ

Max

UnitsVV

Vcc(PD)Power down supply voltageChip select input SVI (S)

-LW, -LI+70 ~ +85°C

-L, -LW, -LI+70°C-HW, -HI+70 ~ +85°C

Icc (PD)

Power down

supply current

Vcc=3.0V, S≥Vcc-0.2V, Other inputs=0 ~ Vcc

-H, -HW, -HI-H-HW

+40 ~ +70°C+25 ~ +40°C0 ~ +25°C-20~ +25°C

2.02.0--------

----10.30.30.3-HI-40~ +25°C

402020103111µAµAµAµAµAµAµAµA

Typical value is for Ta=25°C

(2)TIMINGREQUIREMINTS

Symbol

Parameter

Power down set up timePower down recovery time

Test conditions

Limits

Min 05

Typ

Max

Unitsnsms

tsu (PD)trec (PD)

(3)TIMINGDIAGRAM

Scontrolmode

Vcc

tsu (PD)2.2VS

S≥Vcc - 0.2V2.7V2.7Vtrec (PD)2.2VMITSUBISHIELECTRIC8元器件交易网www.cecb2b.com

revision-K1.0e, ' 98.09.07MITSUBISHILSIs

M5M5V408BFP/TP/RT/KV/KR

4194304-BIT(524288-WORDBY8-BIT)CMOSSTATICRAM

RevisionHistoryRevisionNo.K0.1eK0.2eK1.0e

HistoryThefirstedition

AddedM5M5V408BFP/TP/RTThefirstproductversion

Date'98.3.05'98.7.30'98.9.7

PreliminaryPreliminary

MITSUBISHIELECTRIC932P2M-APlastic 32pin 525mil SOPWeight(g)1.29Lead MaterialAlloy 42eb217EIAJ Package CodeSOP32-P-525-1.27JEDEC Code–元器件交易网www.cecb2b.com

32HEEe1Recommended Mount PadSymbol161AFDA2A1L1byeLcDetail FAA1A2bcDEeHELL1yb2e1I2Dimension in MillimetersMinNomMax––3.0500.10.2–2.75–0.350.40.50.130.150.220.5520.7520.9511.311.411.5–1.27–13.814.114.40.60.81.0–1.35–––0.150°–8°–0.76––13.34––1.27–I2Mar.’9832P3Y-HPlastic 32pin 400mil TSOP ( )Weight(g)0.53eb2Lead MaterialAlloy 42EIAJ Package CodeTSOP 32-P-400-1.27I IJEDEC Code–元器件交易网www.cecb2b.com

EHE116AcDL1LeybA2A1Detail FME3217Recommended Mount PadSymbolAA1A2bcDEeHELL1yMEI2b2Dimension in MillimetersMinNomMax––1.20.1250.20.05––1.00.350.40.50.1050.1250.17520.8520.9521.05 10.1610.2610.06–1.27–11.7611.5611.960.50.40.60.8––––0.1–0°10°10.36––––0.9––0.76I2Mar.’98F32P3Y-JPlastic 32pin 400mil TSOP ( )Weight(g)0.53eb2Lead MaterialAlloy 42EIAJ Package CodeTSOP 32-P-400-1.27I IJEDEC Code–I2元器件交易网www.cecb2b.com

FMERecommended Mount PadSymbolAcL1LDA2Detail FA1AA1A2bcDEeHELL1y17161HEE32eybMEI2b2Dimension in MillimetersMinNomMax––1.20.1250.20.05––1.00.350.40.50.1050.1250.17520.8520.9521.05 10.1610.2610.06–1.27–11.7611.5611.960.50.40.60.8––––0.1–0°10°10.36––––0.9––0.76Mar.’9832P3K-BPlastic 32pin 8!13.4mm TSOP( )Weight(g)MDeLead MaterialAlloy 42元器件交易网www.cecb2b.com

EIAJ Package Code–JEDEC Code–HDl2e32Db2Recommended Mount PadySymbol171EFAA2bL116cAA1A2bcDEeHDLL1yLDetail Fb2I2MDA1Dimension in MillimetersMinNomMax––1.20.050.1250.2–1.0–0.150.20.30.130.150.211.711.811.97.98.08.1–0.5–13.213.413.60.40.50.6–0.8–––0.10°–10°–0.225–0.9––12.0––Mar.’9832P3K-CPlastic 32pin 8!13.4mm TSOP( )Weight(g)MDeLead MaterialAlloy 42元器件交易网www.cecb2b.com

EIAJ Package Code–JEDEC Code–D1b2HD32el2Recommended Mount PadySymbolE16FAbL1A217cAA1A2bcDEeHDLL1yLDetail Fb2I2MDA1Dimension in MillimetersMinNomMax––1.20.050.1250.2–1.0–0.150.20.30.130.150.211.711.811.97.98.08.1–0.5–13.213.413.60.40.50.6–0.8–––0.10°–10°–0.225–0.9––12.0––Mar.’98

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