Pipeline architecture for maximum a posteriori (MA

专利名称：Pipeline architecture for maximum a

posteriori (MAP) decoders

发明人：Edward L. Hepler,Michael F. Starsinic申请号：US10037609申请日：20020102

公开号：US20030066019A1公开日：20030403

专利附图：

摘要：The sliding window approach to pipeline maximum a posteriori (MAP) decoderarchitecture is modified to decrease processing time. Once the forward metrics havebeen calculated for the first sliding window of the decoder, the reverse metrics for each

window are calculated while the forward metrics for the next window are calculated. Aseach new forward metric is calculated and stored into memory, the forward metric fromthe previous window is read from memory for use with reverse metric being calculated incalculating extrinsic value. Each forward metric for use in calculating an extrinsic value isread from memory on the same clock edge that the new forward metric is written to thesame memory location. Although this architecture was developed for a turbo decoder, allconvolution codes can use the MAP algorithm of the present invention.

申请人：INTERDIGITAL TECHNOLOGY CORPORATION

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