CMOS logic circuit for high voltage operation

专利名称：CMOS logic circuit for high voltage

operation

发明人：Olivo, Marco,Pascucci, Luigi,Riva, Carlo,Rosini,

Paolo,Villa, Corrado

申请号：EP89830290.6申请日：19890623公开号：EP0350461A3公开日：19901227

专利附图：

摘要：A CMOS logic circuit for converting a low voltage logic signal with a range 0-VCCinto a high voltage logic signal with a range 0-VPP, which may be entirely made with

enhancement-type transistors, comprises an additional p-channel, decoupling transistor(P6) functionally connected in series with the p-channel transistor (P1) of the CMOS circuitwhich is connected to the high voltage node VPP and the additional decoupling transistoris driven by a bias voltage tied to the VPP voltage and lower than the latter by a certainpreset value. The so-called gated breakdown of p-channel transistors is effectivelyprevented and furthermore these circuits, destined to operate under a high supplyvoltage, may be fabricated through a normal CMOS fabrication process not requiringparticular fabrication techniques for the p-channel transistors subject to gated

breakdown conditions or the formation of depletion-type transistors and without the useof special circuits which require oscillator generated driving signals.

申请人：SGS-THOMSON MICROELECTRONICS S.r.l.

地址：Via C. Olivetti, 2 I-20041 Agrate Brianza (Milano) IT

国籍：IT

代理机构：Pellegri, Alberto

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