IS62LV2568LL
256K x 8 LOW POWER and LOW VccCMOS STATIC RAM
FEATURES
•Access times of 70 and 85 ns•CMOS low power operation:— 120 mW (typical) operating— 6 µW (typical) standby
•Low data retention voltage: 2V (min.)•Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications•TTL compatible inputs and outputs•Fully static operation:
— No clock or refresh required•Single 2.5V to 3.0V power supply
•Available in 32-pin TSOP (Type I), STSOP (Type I),and 36-pin mini BGAISSI
DESCRIPTION
®
APRIL 2000
The ISSI IS62LV2568LL is a low voltage, 262,144 wordsby 8 bits, CMOS SRAM. It is fabricated using ISSI’s lowvoltage, six transistor (6T), CMOS technology. The device istargeted to satisfy the demands of the state-of-the-arttechnologies such as cell phones and pagers.
When CE is HIGH (deselected), the device assumes astandby mode at which the power dissipation can be reduceddown with CMOS input levels. Additionally, easy memoryexpansion is provided by using Chip Enable and OutputEnable inputs, CE and OE. The active LOW Write Enable (WE)controls both writing and reading of the memory.The IS62LV2568LL is available in 32-pin TSOP (Type I),STSOP (Type I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17DECODER256K x 8MEMORY ARRAYVCCGNDI/ODATACIRCUITI/O0-I/O7COLUMN I/OCE1CE2OEWECONTROLCIRCUITISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for anyerrors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
1
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IS62LV2568LL
PIN CONFIGURATION36-pin mini BGA (B)
1 2 3 4 5 6ISSI
PIN DESCRIPTIONS
A0-A17CE1CE2OEWE
Address InputsChip Enable 1 InputChip Enable 2 InputOutput Enable InputWrite Enable InputInput/OutputNo ConnectionPowerGround
®
ABCDEFGHA0I/O4I/O5GNDVccI/O6I/O7A9A1A2CE2WENCA3A4A5A6A7A8I/O0I/O1VccGNDI/O0-I/O7NCVccGND
NCOEA10CE1A11A17A16A12A15A13I/O2I/O3A1432-Pin TSOP (Type I), STSOP (Type I)
A11A9A8A13WECE2A15VCCA17A16A14A12A7A6A5A41234567891011121314151632313029282726252423222120191817OEA10CE1I/O7I/O6I/O5I/O4I/O3GNDI/O2I/O1I/O0A0A1A2A32Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
ISSI
CE2XLHHH
OEXXHLX
I/O OperationHigh-ZHigh-ZHigh-ZDOUTDIN
Vcc CurrentISB1, ISB2ISB1, ISB2ICCICCICC
HXLLL
®
TRUTH TABLE
Mode
Not Selected(Power-down)Output DisabledReadWrite
WEXXHHL
CE1
OPERATING RANGE
Range
CommercialIndustrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
VCC
2.5V to 3.0V2.5V to 3.0V
ABSOLUTE MAXIMUM RATINGS(1)
SymbolVTERMVCCTBIASTSTGPT
Parameter
Terminal Voltage with Respect to GNDVcc related to GND
Temperature Under BiasStorage TemperaturePower Dissipation
Value
–0.5 to Vcc + 0.5–0.3 to +4.6–40 to +85–65 to +150
0.7
UnitVV°C°CW
Note:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of thedevice at these or any other conditions above those indicated in the operational sections ofthis specification is not implied. Exposure to absolute maximum rating conditions forextended periods may affect reliability.
CAPACITANCE(1,2)
SymbolCINCOUT
ParameterInput CapacitanceOutput Capacitance
ConditionsVIN = 0VVOUT = 0V
Max.68
UnitpFpF
Notes:
1.Tested initially and after any design or process changes that may affect these parameters.2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.0V.
Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
SymbolParameterVOHVOLVIHVILILIILO
Output HIGH VoltageOutput LOW VoltageInput HIGH VoltageInput LOW Voltage(1)Input LeakageOutput Leakage
Test Conditions
VCC = Min., IOH = –1.0 mAVCC = Min., IOL = 2.1 mA
Min.2.0—2.2–0.3–1–1
ISSI
Max.—0.4VCC + 0.30.411
VVVVµAµA
®
Unit
GND ≤ VIN ≤ VCCGND ≤ VOUT ≤ VCC
Note:
1.VIL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
SymbolParameterICC
Vcc DynamicOperating
Supply CurrentTTL StandbyCurrent
(TTL Inputs)CMOS StandbyCurrent
(CMOS Inputs)
Test ConditionsVCC = Max., CE = VILIOUT = 0 mA, f = fMAX
Com.Ind.
-70Min.Max.——————
30350.41.055
-85Min.Max.——————
25300.41.055
UnitmA
ISB1
VCC = Max.,Com.VIN = VIH or VIL,Ind.CE1 ≥ VIH or CE2 ≤ VIL, f = 0VCC = Max., f = 0Com.CE1 ≥ VCC – 0.2V,Ind.CE2 ≤ 0.2V,
orVIN ≥ VCC – 0.2V, VIN ≤ 0.2V
mA
ISB2µA
Note:
1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-70
Symbol
ParameterRead Cycle TimeAddress Access TimeOutput Hold TimeCE1 Access TimeCE2 Access TimeOE Access TimeOE to High-Z OutputOE to Low-Z OutputCE1 to Low-Z OutputCE2 to Low-Z OutputCE1 or CE2 to High-Z Output
Min.70—10————510100
Max.—70—70703525———25
Min.85—15————510100
-85
Max.—85—85854525———25
ISSI
Unitnsnsnsnsnsnsnsnsnsnsns
®
tRCtAAtOHAtACE1tACE2tDOEtHZOE(2)tLZOE(2)tLZCE1(2)tLZCE2(2)tHZCE(2)
Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V andoutput loading specified in Figure 1.
2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall TimesInput and Output Timingand Reference LevelOutput Load
Unit0.4V to 2.2V
5 ns1.3VSee Figures 1 and 2
AC TEST LOADS
3070 Ω2.8VOUTPUT30 pFIncludingjig andscope3150 Ω2.8VOUTPUT3070 Ω5 pFIncludingjig andscope3150 ΩFigure 1Figure 2
Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
AC WAVEFORMSREAD CYCLE NO. 1(1,2)
ISSI
®
tRCADDRESStAAtOHAtOHADATA VALIDDOUTREAD CYCLE NO. 2(1,3)
tRCADDRESStAAtOHAOEtDOEtHZOECE1tACE1/tACE2tLZOECE2tLZCE1/tLZCE2HIGH-ZtHZCE DATA VALIDDOUTNotes:
1.WE is HIGH for a Read Cycle.
2.The device is continuously selected. OE, CE1 = VIL, CE2 = VIH.
3.Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
6Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
ISSI
-70
-85
Max.—————————33—
Min.857070700060350—5
Max.—————————25—
Unitnsnsnsnsnsnsnsnsnsnsns
Min.706565650060300—5
®
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low Power)
Symbol
ParameterWrite Cycle TimeCE1 to Write EndCE2 to Write End
Address Setup Time to Write EndAddress Hold from Write EndAddress Setup TimeWE Pulse WidthData Setup to Write EndData Hold from Write EndWE LOW to High-Z OutputWE HIGH to Low-Z Output
tWCtSCE1tSCE2tAWtHAtSAtPWE(4)tSDtHDtHZWE(2)tLZWE(2)
Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and output loading specified in Figure 1.2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3.The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive toterminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write.4.Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CE Controlled, OE = HIGH or LOW)
tWCADDRESStSCE1tHACE1tSCE2CE2tAWtPWE(4)tSAtHZWEHIGH-ZWEtLZWEDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALIDIntegrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
tWCISSI
®
ADDRESSOEtSCE1tHACE1tSCE2CE2tAWtPWE1, 2tSAtHZWEHIGH-ZWEtLZWEDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALIDWRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
tWCADDRESSOEtSCE1tHACE1tSCE2CE2tAWtPWE1, 2tSAtHZWEHIGH-ZWEtLZWEDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALID8Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
DATA RETENTION SWITCHING CHARACTERISTICS
SymbolVDRIDRtSDRtRDR
Parameter
Vcc for Data RetentionData Retention CurrentData Retention Setup TimeRecovery Time
Test Condition
See Data Retention WaveformVcc = 2.0V, CE1 ≥ Vcc – 0.2VSee Data Retention WaveformSee Data Retention Waveform
Com.Ind.
Min.2.0——0tRC
ISSI
Max.3.625——
UnitVµAµAnsns
®
DATA RETENTION WAVEFORM (CE1 Controlled)
tSDRVCCData Retention ModetRDR3.0V2.2VVDRCE1 ≥ VCC Ð 0.2VCE1GNDDATA RETENTION WAVEFORM (CE2 Controlled)
Data Retention ModeVCCtSDRtRDR3.0CE22.2VVDR0.4VGNDCE2 ≤ 0.2VIntegrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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IS62LV2568LL
ORDERING INFORMATIONCommercial Range: 0°C to +70°C
Speed (ns) Order Part No.70IS62LV2568LL-70BIS62LV2568LL-70TIS62LV2568LL-70HIS62LV2568LL-85BIS62LV2568LL-85TIS62LV2568LL-85HPackagemini BGA (6mm x 8mm)TSOP, Type ISTSOP, Type Imini BGA (6mm x 8mm)TSOP, Type ISTSOP, Type IISSI
®
85Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.70IS62LV2568LL-70BIIS62LV2568LL-70TIIS62LV2568LL-70HIIS62LV2568LL-85BIIS62LV2568LL-85TIIS62LV2568LL-85HIPackagemini BGA (6mm x 8mm)TSOP, Type ISTSOP, Type Imini BGA (6mm x 8mm)TSOP, Type ISTSOP, Type I85ISSI
®
Integrated Silicon Solution, Inc.2231 Lawson LaneSanta Clara, CA 95054Tel: 1-800-379-4774Fax: (408) 588-0806E-mail: sales@issi.com
www.issi.com
10Integrated Silicon Solution, Inc. — 1-800-379-4774Rev.B05/03/00
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