Integrated circuit arrangement with capacitor and

专利名称：Integrated circuit arrangement with

capacitor and fabrication method

发明人：Ralf Brederlow,Jessica Hartwich,Christian

Pacha,Wolfgang Rösner,Thomas Schulz

申请号：US11862640申请日：20070927公开号：US07820505B2公开日：20101026

专利附图：

摘要：An integrated circuit arrangement contains an insulating region, which is part ofa planar insulating layer, and a capacitor which contains: near and far electrode regions

near and remote from the insulating region and a dielectric region. The capacitor and anactive component are on the same side of the insulating layer, and the near electroderegion and an active region of the component are planar and parallel to the insulatinglayer. The near electrode region is monocrystalline and contains multiple webs.Alternately, a FET is present in which: a channel region is the active region, the FETcontains a web with opposing control electrodes connected by a connecting region thatis isolated from the channel region by a thick insulating region. The thick insulating regionis thicker than control electrode insulation regions. The control electrodes contain thesame material as the far electrode region.

申请人：Ralf Brederlow,Jessica Hartwich,Christian Pacha,Wolfgang Rösner,ThomasSchulz

地址：Poing DE,Neubiberg DE,München DE,Ottobrunn DE,Austin TX US

国籍：DE,DE,DE,DE,US

代理机构：Brinks Hofer Gilson & Lione

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